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Nano & Quantum Computing

01SHORV

A.A. 2018/19

Course Language

English

Course degree

Doctorate Research in Electrical, Electronics And Communications Engineering - Torino

Course structure
Teaching Hours
Lezioni 40
Teachers
Teacher Status SSD h.Les h.Ex h.Lab h.Tut Years teaching
Graziano Mariagrazia Ricercatore ING-INF/01 28 0 0 0 1
Teaching assistant
Espandi

Context
SSD CFU Activities Area context
*** N/A ***    
2018/19
PERIOD: FEBRUARY - MARCH This course aims at giving the student a detailed overview of the computation circuits and systems for computations that are expected to become the main actor in the forthcoming scenario, going beyonf the ultra-scaled CMOS technologies and focusing the attention on the emerging technologies among which the winner is still to be defined. Those devices, circuits and systems will be analyzed considering the connection among CMOS and beyond COMS devices with circuits and architectures based on them. This because the complexity of nanoscale systems does not allow to disentangle different planes as design, analysis and evaluation.
PERIOD: FEBRUARY - MARCH This course aims at giving the student a detailed overview of the computation circuits and systems for computations that are expected to become the main actor in the forthcoming scenario, going beyonf the ultra-scaled CMOS technologies and focusing the attention on the emerging technologies among which the winner is still to be defined. Those devices, circuits and systems will be analyzed considering the connection among CMOS and beyond COMS devices with circuits and architectures based on them. This because the complexity of nanoscale systems does not allow to disentangle different planes as design, analysis and evaluation.
• State of the art: nanocomputing in ULTRA scaled CMOS: ◦ CMOS scaling trends at device levels: scaling, leakage, double-gate transistors, FinFET, … ◦ Circuit and architectural techniques: dark silicon, dynamic voltage scaling, subthreshold computation, ..... • Field coupled nanocomputing (FCN): ◦ quantum dot cellular automata (QCA), nano magnetic logic (NML), molecular QCA, silicon based QCA; discussions on technology, behavior, models, energyconsumption, speed, area ◦ interconnections: magnetic domain walls, spin waves, molecular wires ◦ designing a FCN circuit: a new design paradigm toward intrinsic pipelining ◦ circuits and architectures based on FCN structures: syncrhonous, asynchronous, null-convention logic; how to solve feedback problems; cut set retiming; solutions based on systolic arrays and interleaving • Nanoarray nanocomputing based on nanowires: ◦ devices: Gate-All-Around transistors, Ambipolar transistors (silicon based, zinc-oxide, carbon nanotubes, …) ◦ circuits: nano-PLA, NanoASIC, reconfigurable nanoFPGA ◦ architectures: sea of nanoarrays for massive computation and "embarassingly parallel" elaboration • Logic in memory ◦ Devices: resistive memories, memristors, nanomagnets and magnetic memories ◦ Circuits: logic embedded in memory, communications and protocols ◦ Architectures: caches to the limit, use hic what you need nunc, search nearby what you need later • Devices and architectures for quantum computation ◦ Fundamentals of quantum computation ◦ Devices and technologies for quantum computation ◦ Circuits and architectures
• State of the art: nanocomputing in ULTRA scaled CMOS: ◦ CMOS scaling trends at device levels: scaling, leakage, double-gate transistors, FinFET, … ◦ Circuit and architectural techniques: dark silicon, dynamic voltage scaling, subthreshold computation, ..... • Field coupled nanocomputing (FCN): ◦ quantum dot cellular automata (QCA), nano magnetic logic (NML), molecular QCA, silicon based QCA; discussions on technology, behavior, models, energyconsumption, speed, area ◦ interconnections: magnetic domain walls, spin waves, molecular wires ◦ designing a FCN circuit: a new design paradigm toward intrinsic pipelining ◦ circuits and architectures based on FCN structures: syncrhonous, asynchronous, null-convention logic; how to solve feedback problems; cut set retiming; solutions based on systolic arrays and interleaving • Nanoarray nanocomputing based on nanowires: ◦ devices: Gate-All-Around transistors, Ambipolar transistors (silicon based, zinc-oxide, carbon nanotubes, …) ◦ circuits: nano-PLA, NanoASIC, reconfigurable nanoFPGA ◦ architectures: sea of nanoarrays for massive computation and "embarassingly parallel" elaboration • Logic in memory ◦ Devices: resistive memories, memristors, nanomagnets and magnetic memories ◦ Circuits: logic embedded in memory, communications and protocols ◦ Architectures: caches to the limit, use hic what you need nunc, search nearby what you need later • Devices and architectures for quantum computation ◦ Fundamentals of quantum computation ◦ Devices and technologies for quantum computation ◦ Circuits and architectures
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Exam:


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