Servizi per la didattica
PORTALE DELLA DIDATTICA

LabView-based programming toolchains for Power Electronics control applications: from implementation to deploy (didattica di eccellenza)

01UOFRV

A.A. 2019/20

Course Language

Inglese

Course degree

Doctorate Research in Ingegneria Elettrica, Elettronica E Delle Comunicazioni - Torino

Course structure
Teaching Hours
Lezioni 20
Teachers
Teacher Status SSD h.Les h.Ex h.Lab h.Tut Years teaching
Pellegrino Gianmario Professore Ordinario ING-IND/32 2 0 0 0 1
Teaching assistant
Espandi

Context
SSD CFU Activities Area context
*** N/A ***    
2019/20
PERIOD: JANUARY - FEBRUARY Prof. Alessandro Lidozzi - Roma Tre Nowadays, even a common power converter can exhibit an increased number of active devices and higher switching frequency than ever to satisfy a higher control performance demand. This results in an increased complexity related to the control board, where usually a combined C (or P, DSP) and FPGA are both installed. Those two ‘actors’ require a completely different programming approach and development tools from those employed by traditional boards. Accordingly, control algorithm development is considered a ‘time consuming’ task within a research or industrial project. IDE (Integrated Development Environment), provided by the control platforms manufacturers or third parties, are constantly moving from the classical, old, text-based approach to a new, fast and simple to learn graphical programming method. Moreover, a high level of abstraction is usually demanded in order to accelerate the learning time even on non-specialist workers; however, a full control on the hardware is still mandatory. This class will cover the methodologies to switch to new graphical programming development environments, starting from a review and going into the most promising solutions. Code splitting between targets, best practices, and code efficiency will be part of the tutorial. The usage of FPGA has some inherent drawbacks such as the long compiling time: FPGA co-simulation and hardware-in-the-loop techniques will be also covered to help the designer workflow.
PERIOD: JANUARY - FEBRUARY Prof. Alessandro Lidozzi - Roma Tre Nowadays, even a common power converter can exhibit an increased number of active devices and higher switching frequency than ever to satisfy a higher control performance demand. This results in an increased complexity related to the control board, where usually a combined C (or P, DSP) and FPGA are both installed. Those two ‘actors’ require a completely different programming approach and development tools from those employed by traditional boards. Accordingly, control algorithm development is considered a ‘time consuming’ task within a research or industrial project. IDE (Integrated Development Environment), provided by the control platforms manufacturers or third parties, are constantly moving from the classical, old, text-based approach to a new, fast and simple to learn graphical programming method. Moreover, a high level of abstraction is usually demanded in order to accelerate the learning time even on non-specialist workers; however, a full control on the hardware is still mandatory. This class will cover the methodologies to switch to new graphical programming development environments, starting from a review and going into the most promising solutions. Code splitting between targets, best practices, and code efficiency will be part of the tutorial. The usage of FPGA has some inherent drawbacks such as the long compiling time: FPGA co-simulation and hardware-in-the-loop techniques will be also covered to help the designer workflow.
Theory and practice with the National Instruments sbRIO-9651 and Linux real-time OS. Insight view and develop of specific Power Electronics and Drives applications using LabVIEW integrated development environment. • LabVIEW basic concepts, front panel and block diagram, debugging, programming guidelines. Application development. Graphical programming of the Real-Time and FPGA targets. Communication between targets. Code efficiency and best practices. • Development of the FPGA main scheduler and synchronization with the on board Processor, PWM modulator with configurable dead-time. • Floating-point math operations on FPGA target. (a must have!) • Development of high-performance control algorithms such as repetitive control, resonant controllers, Model Predictive Control and combined control structures. Code splitting between targets. Insight view of PWM modulators for multilevel power converter topologies. • LabVIEW FPGA/ NI-Multisim co-simulation, a very powerful tool to test the developed FPGA code. • Closed loop tests with the Hardware-in-the-loop simulator.
Theory and practice with the National Instruments sbRIO-9651 and Linux real-time OS. Insight view and develop of specific Power Electronics and Drives applications using LabVIEW integrated development environment. • LabVIEW basic concepts, front panel and block diagram, debugging, programming guidelines. Application development. Graphical programming of the Real-Time and FPGA targets. Communication between targets. Code efficiency and best practices. • Development of the FPGA main scheduler and synchronization with the on board Processor, PWM modulator with configurable dead-time. • Floating-point math operations on FPGA target. (a must have!) • Development of high-performance control algorithms such as repetitive control, resonant controllers, Model Predictive Control and combined control structures. Code splitting between targets. Insight view of PWM modulators for multilevel power converter topologies. • LabVIEW FPGA/ NI-Multisim co-simulation, a very powerful tool to test the developed FPGA code. • Closed loop tests with the Hardware-in-the-loop simulator.
Il corso si terrà presso il Lab. Didattico Tommasini del DENERG nei seguenti giorni: Mar 18 febbraio 14.00 - 18.00 Mer 19 febbraio 9.00 - 12.00 , 13.00 - 16.30 Gio 20 febbraio 9.00 - 12.00 , 13.00 -16.30 Ven 21 febbraio 9.00 - 12.00
Il corso si terrà presso il Lab. Didattico Tommasini del DENERG nei seguenti giorni: Mar 18 febbraio 14.00 - 18.00 Mer 19 febbraio 9.00 - 12.00 , 13.00 - 16.30 Gio 20 febbraio 9.00 - 12.00 , 13.00 -16.30 Ven 21 febbraio 9.00 - 12.00
Modalità di esame:
Exam:
Gli studenti e le studentesse con disabilità o con Disturbi Specifici di Apprendimento (DSA), oltre alla segnalazione tramite procedura informatizzata, sono invitati a comunicare anche direttamente al/la docente titolare dell'insegnamento, con un preavviso non inferiore ad una settimana dall'avvio della sessione d'esame, gli strumenti compensativi concordati con l'Unità Special Needs, al fine di permettere al/la docente la declinazione più idonea in riferimento alla specifica tipologia di esame.
Exam:
In addition to the message sent by the online system, students with disabilities or Specific Learning Disorders (SLD) are invited to directly inform the professor in charge of the course about the special arrangements for the exam that have been agreed with the Special Needs Unit. The professor has to be informed at least one week before the beginning of the examination session in order to provide students with the most suitable arrangements for each specific type of exam.
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