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Computer architectures

02LSEOV, 02LSEOQ

A.A. 2018/19

Course Language

Inglese

Course degree

Master of science-level of the Bologna process in Ingegneria Informatica (Computer Engineering) - Torino
Master of science-level of the Bologna process in Ingegneria Elettronica (Electronic Engineering) - Torino

Course structure
Teaching Hours
Lezioni 80
Esercitazioni in laboratorio 20
Teachers
Teacher Status SSD h.Les h.Ex h.Lab h.Tut Years teaching
Bernardi Paolo - Corso 1 Professore Associato ING-INF/05 71 0 30 0 1
Sanchez Sanchez Edgar Ernesto - Corso 2 Professore Associato ING-INF/05 80 0 30 0 2
Teaching assistant
Espandi

Context
SSD CFU Activities Area context
ING-INF/05 10 B - Caratterizzanti Ingegneria informatica
2018/19
The course is taught in English. The course provides the principles of modern processor architectures, as well as a general view of microprocessor based systems.
The course is taught in English. The course provides the principles of modern processor architectures, as well as a general view of microprocessor based systems.
Embedded systems are, among all, tightly combining architecture and special purpose software designs. This implies that both hardware and software projects are not only mutually influencing one the other, but also that an embedded system designer must count on a good knowledge and expertise of low level programming. The main goal of this course is to provide the Students with these capabilities, both from theoretical and practical points of view. The course, in addition, poses special attention to these two elements: - the architectural aspects affecting microprocessor performance; - the development flow of embedded systems applications.
Embedded systems are, among all, tightly combining architecture and special purpose software designs. This implies that both hardware and software projects are not only mutually influencing one the other, but also that an embedded system designer must count on a good knowledge and expertise of low level programming. The main goal of this course is to provide the Students with these capabilities, both from theoretical and practical points of view. The course, in addition, poses special attention to these two elements: - the architectural aspects affecting microprocessor performance; - the development flow of embedded systems applications.
• Knowledge of basics of computer architectures and systems; • Knowledge and practice of high-level programming techniques and language(s).
• Knowledge of basics of computer architectures and systems; • Knowledge and practice of high-level programming techniques and language(s).
• Basic microprocessor architecture background; • Introduction to modern microprocessor architectures; • CISC, RISC and superscalar processor architectures, behavior and performance; • Microprocessor-based systems architecture; • Development flow of embedded system applications using a development board; • Advance programming techniques for embedded systems: theory and practice.
• Basic microprocessor architecture background; • Introduction to modern microprocessor architectures; • CISC, RISC and superscalar processor architectures, behavior and performance; • Microprocessor-based systems architecture; • Development flow of embedded system applications using a development board; • Advance programming techniques for embedded systems: theory and practice.
• Class lectures: 50% of the course duration; • Extensive Class exercise time: 30% of the course duration; • Assisted laboratories: 20% of the course duration. Students are highly invited to interact with Lecturers, at lecture, exercise, and laboratory slots.
• Class lectures: 50% of the course duration; • Extensive Class exercise time: 30% of the course duration; • Assisted laboratories: 20% of the course duration. Students are highly invited to interact with Lecturers, at lecture, exercise, and laboratory slots.
• J.L. Hennessy, D.A. Patterson, Computer Architecture: a Quantitative Approach, Morgan Kaufmann Publishers, Inc., VI Edition, 2017 • Steve Furber, ARM system-on-chip architecture, Addison-Wesley, 2000 • Optional additional material provided by the Lecturers.
• J.L. Hennessy, D.A. Patterson, Computer Architecture: a Quantitative Approach, Morgan Kaufmann Publishers, Inc., VI Edition, 2017 • Steve Furber, ARM system-on-chip architecture, Addison-Wesley, 2000 • Optional additional material provided by the Lecturers.
Modalità di esame: Prova scritta (in aula); Prova orale facoltativa; Prova pratica di laboratorio; Elaborato scritto individuale;
Exam: Written test; Optional oral exam; Practical lab skills test; Individual essay;
Gli studenti e le studentesse con disabilità o con Disturbi Specifici di Apprendimento (DSA), oltre alla segnalazione tramite procedura informatizzata, sono invitati a comunicare anche direttamente al/la docente titolare dell'insegnamento, con un preavviso non inferiore ad una settimana dall'avvio della sessione d'esame, gli strumenti compensativi concordati con l'Unità Special Needs, al fine di permettere al/la docente la declinazione più idonea in riferimento alla specifica tipologia di esame.
Exam: Written test; Optional oral exam; Practical lab skills test; Individual essay;
-written part -laboratory check The written examination aims to assess the student comprehension and analysis capacity of the studied topics. The written exam is composed of two parts, the first one requires to solve some exercises focusing on the architectural behavior of modern processor cores; in the second part, it is required to write a program to solve a given problem. The maximum duration of the exam ranges on average 2 hours. A mandatory laboratory check is also required. The maximum score for the written exam is 30 cum laude. During the discussion of the score of the written test, a supplementary oral test can be requested at the discretion of the professor or of the student, but only if the score of the written test is at least 18/30.
In addition to the message sent by the online system, students with disabilities or Specific Learning Disorders (SLD) are invited to directly inform the professor in charge of the course about the special arrangements for the exam that have been agreed with the Special Needs Unit. The professor has to be informed at least one week before the beginning of the examination session in order to provide students with the most suitable arrangements for each specific type of exam.
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