Servizi per la didattica
PORTALE DELLA DIDATTICA

Computer architectures

02LSEOV, 02LSEOQ

A.A. 2019/20

Course Language

English

Course degree

Master of science-level of the Bologna process in Computer Engineering - Torino
Master of science-level of the Bologna process in Electronic Engineering - Torino

Course structure
Teaching Hours
Lezioni 80
Esercitazioni in laboratorio 20
Teachers
Teacher Status SSD h.Les h.Ex h.Lab h.Tut Years teaching
Montuschi Paolo Professore Ordinario ING-INF/05 35 0 10 0 9
Teaching assistant
Espandi

Context
SSD CFU Activities Area context
ING-INF/05 10 B - Caratterizzanti Ingegneria informatica
2019/20
The course is taught in English. Mandatory course for Laurea Magistrale in Computer Science Engineering, in the first year and first semester of the course. The purpose of the course is to provide a better knowledge on the elaboration system architecture, with a particular attention to microprocessor based systems. The course analyzes the several components of an elaboration system: from the microprocessor internal architecture, up to system bus for peripheral devices management.
The course is taught in English. Mandatory course for Laurea Magistrale in Computer Science Engineering, in the first year and first semester of the course. The purpose of the course is to provide a better knowledge on the elaboration system architecture, with a particular attention to microprocessor based systems. The course analyzes the several components of an elaboration system: from the microprocessor internal architecture, up to system bus for peripheral devices management.
- Knowledge of several processor architectures, with particular attention paid to x86, ARM and MIPS families - Superscalar and multithread architectures - Knowledge of the sw/hw architecture of an embedded system - Knowledge about system bus, cpu and I/O characteristics - Competences about I/O management and interface design - Competences about development of applications for embedded systems - Assembly code implementation for I/O device management.
- Knowledge of several processor architectures, with particular attention paid to x86, ARM and MIPS families - Superscalar and multithread architectures - Knowledge of the sw/hw architecture of an embedded system - Knowledge about system bus, cpu and I/O characteristics - Competences about I/O management and interface design - Competences about development of applications for embedded systems - Assembly code implementation for I/O device management.
- Knowledge of basic elaboration systems architecture: processor structure, memory organization and peripheral management - Knowledge of basic functionalities of operative systems - Capability to develop programs in assembler language.
- Knowledge of basic elaboration systems architecture: processor structure, memory organization and peripheral management - Knowledge of basic functionalities of operative systems - Capability to develop programs in assembler language.
• Advanced description of the basic microprocessor architecture • Introduction to modern microprocessor architectures • CISC, RISC and superscalar processor architectures, behavior and performance • Microprocessor-based systems architecture • Development flow of embedded system applications using a development board • Advanced programming techniques for embedded systems: theory and practice • Advanced assembly programming techniques (ARM, 8086): theory and practice.
• Advanced description of the basic microprocessor architecture • Introduction to modern microprocessor architectures • CISC, RISC and superscalar processor architectures, behavior and performance • Microprocessor-based systems architecture • Development flow of embedded system applications using a development board • Advanced programming techniques for embedded systems: theory and practice • Advanced assembly programming techniques (ARM, 8086): theory and practice.
• Class lectures: 50% of the course duration • Extensive Class exercise time: 30% of the course duration • Assisted laboratories: 20% of the course duration. Students are highly invited to interact with Lecturers, at lecture, exercise, and laboratory slots
• Class lectures: 50% of the course duration • Extensive Class exercise time: 30% of the course duration • Assisted laboratories: 20% of the course duration. Students are highly invited to interact with Lecturers, at lecture, exercise, and laboratory slots
• J.L. Hennessy, D.A. Patterson, Computer Architecture: a Quantitative Approach, Morgan Kaufmann Publishers, Inc., VI Edition, 2017 • Steve Furber, ARM system-on-chip architecture, Addison-Wesley, 2000. Optional additional material provided by the Lecturers.
• J.L. Hennessy, D.A. Patterson, Computer Architecture: a Quantitative Approach, Morgan Kaufmann Publishers, Inc., VI Edition, 2017 • Steve Furber, ARM system-on-chip architecture, Addison-Wesley, 2000. Optional additional material provided by the Lecturers.
Modalità di esame: prova scritta; prova orale obbligatoria;
The exam consists of a written plus a (mandatory) oral part. The written part is further divided into two sub-parts: 1. The first sub-part consists of open&closed questions about subjects covered during lectures. While this sub-part is being run, it is not possible to use any book or other material. Max score = 8 points; minimum score to have this first sub-part passed = 4 points. 2. The second sub-part consists of the development of an assembly program. While this sub-part is being run, it is possible to use only printed books and/or documents in electronic format downloaded from the web site of the course (Portale della Didattica). Maximum score = 18 points; minimum score to have this second sub-part passed = 10 points. The written part (=first+second sub-parts) lasts from 2 to 3 hours and has to be passed in both its two sub-parts. Failing one of the two sub-parts will imply a rejection. The correction of the written tests takes place during the oral part; the presence of the student is required, otherwise his/her vote will be rejected / refused. Points in the two parts are added up. At the end of the correction, the student will be able to continue the oral exam, consisting of at most three additional questions adding up to 8 more points. The first oral question (max 3 points) will be, by definition, always on laboratory exercises, while the other two will cover in full the course's program. Failure to satisfactorily responding a question, will imply a negative score for that question and the possible termination of the oral exam. If less than 18 points are obtained, a rejection will be registered. Professor(s) has (have) the right to ask at any time oral questions to get a better and more complete picture of the student's preparation. The final grade will be determined by adding up all the points collected by the student and rounding the numerical result. Laude will be granted to all students whose number of points exceeds 31.5 (before rounding). Overall, the exam is targeted at evaluating the students both from their abilities to design, write and run assembly programs, and their knowledge of modern computing systems architectures.
Exam: written test; compulsory oral exam;
The exam consists of a written plus a (mandatory) oral part. The written part is further divided into two sub-parts: 1. The first sub-part consists of open&closed questions about subjects covered during lectures. While this sub-part is being run, it is not possible to use any book or other material. Max score = 8 points; minimum score to have this first sub-part passed = 4 points. 2. The second sub-part consists of the development of an assembly program. While this sub-part is being run, it is possible to use only printed books and/or documents in electronic format downloaded from the web site of the course (Portale della Didattica). Maximum score = 18 points; minimum score to have this second sub-part passed = 10 points. The written part (=first+second sub-parts) lasts from 2 to 3 hours and has to be passed in both its two sub-parts. Failing one of the two sub-parts will imply a rejection. The correction of the written tests takes place during the oral part; the presence of the student is required, otherwise his/her vote will be rejected / refused. Points in the two parts are added up. At the end of the correction, the student will be able to continue the oral exam, consisting of at most three additional questions adding up to 8 more points. The first oral question (max 3 points) will be, by definition, always on laboratory exercises, while the other two will cover in full the course's program. Failure to satisfactorily responding a question, will imply a negative score for that question and the possible termination of the oral exam. If less than 18 points are obtained, a rejection will be registered. Professor(s) has (have) the right to ask at any time oral questions to get a better and more complete picture of the student's preparation. The final grade will be determined by adding up all the points collected by the student and rounding the numerical result. Laude will be granted to all students whose number of points exceeds 31.5 (before rounding). Overall, the exam is targeted at evaluating the students both from their abilities to design, write and run assembly programs, and their knowledge of modern computing systems architectures.


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