The course is taught in English. This course introduces the basic concepts of synthesis and optimization of CMOS digital circuits.

- Knowledge of Electronic Design Automation flows with particular emphasis on synthesis and optimization techniques; - Modeling of digital circuits and abstract data structures used in CAD tools; - Knowledge of behavioral- and logic-level synthesis methodologies; - Understanding of the main optimization techniques and their algorithms for different cost functions (Area, Delay, Power consumption) - Practical skills in commercial synthesis tools, industrial deep-submicron CMOS technologies and TCL scripting language

- Software programming (data structures and algorithms) - Basics of digital electronics (CMOS and logic circuits, computer architecture) - Hardware description languages (Verilog/VHDL)

- Introduction to electronic design automation for digital circuits and basic concepts behind synthesis and optimization (1 credit) - Computer-aided design methods, techniques and algorithms at different levels of abstraction (3 credits): o Synthesis and optimizations algorithms at the behavioral level (Scheduling, Sharing and binding algorithms) o Synthesis and optimizations algorithms at the logic level (Boolean and Algebraic methods) o Technology mapping (Boolean and Structural matching) - Computer-aided design for low-power circuits (2 credits): o Power modeling o Low-power design techniques at behavioral and logic level

The course includes both exercises during regular classes and lab practices. Exercises: will cover the main theoretical aspects introduced in the course. Lab practice (groups of 2-3 students): aim at providing students with technical skills on industrial CAD tools for the design of digital circuits, like synthesis tools at physical, logical and behavioral level, simulators, tools for power analysis, area and delay estimation; the scripting language TCL will be introduced as the main interface to those tools.

Class handouts and additional material will be made available on the course webpage. User guides for lab sessions will be made available as well. Main reference book: G. De Micheli, Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994.

Modalità di esame: Prova scritta tramite PC con l'utilizzo della piattaforma di ateneo; Elaborato progettuale in gruppo;

The exam includes two main mandatory parts. The first one (70% of the final score) is a written test including both numerical exercises and open-ended questions on the technical topics introduced during the course (format: multiple choice and open-ended questions using the online platform Exam integrated with proctoring tools Respondous). The time allowed for the test is 1.5 hours, closed books; the maximum score for this part is 27 points. The second part (30% of the final score) consists of a group project in which some of the techniques described in the course will be implemented on the EDA framework used during the lab sessions; the maximum score for this project is 3 points. The final score is the sum of the score obtained in the two parts.

Modalità di esame: Test informatizzato in laboratorio; Prova scritta tramite PC con l'utilizzo della piattaforma di ateneo; Elaborato progettuale in gruppo;

The exam includes two main mandatory parts. The first one (70% of the final score) is a written test including both numerical exercises and open-ended questions on the technical topics introduced during the course (format: multiple choice and open-ended questions using the online platform Exam integrated with proctoring tools Respondous). The time allowed for the test is 1.5 hours, closed books; the maximum score for this part is 27 points. The second part (30% of the final score) consists of a group project in which some of the techniques described in the course will be implemented on the EDA framework used during the lab sessions; the maximum score for this project is 3 points. The final score is the sum of the score obtained in the two parts.