The course is taught in English.
The course offers an overview of microprocessor based systems with special attention to low level assembly programming in parallel and non-parallel architectures.

Embedded systems are, among all, tightly combining architecture and special purpose software designs. This implies that both hardware and software projects are not only mutually influencing one the other, but also that an embedded system designer must count on a deep knowledge and expertise of low level programming. The main goal of this course is to provide the Students with these capabilities, both from theoretical and practical points of view.

• Knowledge of basics of computer architectures and systems;
• Knowledge and practice of high level programming techniques and language(s).

• Review of basic computer systems and architectures;
• Characteristics of assembly languages and differences vs. high level languages;
• Programming techniques: theory and practice;
• Introduction to modern microprocessor architectures;
• RISC and superscalar processor architectures and their behavior;
• A typical microprocessor-based system architecture.

Real problems and their solutions.

• Class lectures: 50% of the course duration;
• Extensive Class exercise time: 30% of the course duration;
• Assisted Programming laboratories: 20% of the course duration.

Students are highly invited to interact with Lecturers, both at lecture and exercise times. In addition, Students are highly recommended to interact also by using the resources made available through the web pages of the Course, such as the Forum tools.

• Any textbook and support available on assembly and parallel systems low level programming;
• Optional additional material provided by the Lecturers.

Additional reading (among all):
• Irvine, "Assembly language for intel-based computers", IV ed., Prentice Hall
• Messmer, "PC hardware book", IV ed., Addison Wesley
• J.L. Hennessy, D.A. Patterson, Computer Architecture: a Quantitative Approach, Morgan Kaufmann Publishers, Inc., V Edition, 2012
• Steve Furber, ARM system-on-chip architecture, Addison-Wesley, 2000

• Written part on assembly (i.e., part I, accounting up to 45% while computing the final score) and parallel systems low level programming (i.e., part II, accounting up to 45% while computing the final score); the texts on the two parts are distributed to the students during the written exam call and should be both returned by the end of the call in not any particular order, whose maximum duration ranges on average 2.5 hours plus/minus 30 minutes. Students are allowed to check only user manuals for the assembly part, but nothing more, as long as they have not returned their solution on part II.
• Mandatory oral part including the practical check of the solutions proposed for the written part (accounting from up to 10% while computing the final score, to minus 100% of the points achieved from the written
exam- parts I and II). In other words, a severe failure in the oral part can determine a final rejection.