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Emerging Ultra-low Voltage, Ultra-Low Power Analog and Mixed-Signal Integrated Circuits for the IoT
01DNZRV
A.A. 2022/23
Course Language
Inglese
Degree programme(s)
Doctorate Research in Ingegneria Elettrica, Elettronica E Delle Comunicazioni - Torino
Course structure
| Teaching | Hours |
|---|---|
| Lezioni | 20 |
Lecturers
| Teacher | Status | SSD | h.Les | h.Ex | h.Lab | h.Tut | Years teaching |
|---|---|---|---|---|---|---|---|
| Crovetti Paolo Stefano | Professore Associato | IIET-01/A | 20 | 0 | 0 | 0 | 4 |
Co-lectures
Context
| SSD | CFU | Activities | Area context |
|---|---|---|---|
| *** N/A *** |
The course aims to provide an overview of low frequency analog and mixed-signal integrated circuit design challenges and circuit solutions emerged in the last years, with a special emphasis on ultra-low-voltage (ULV), ultra-low-power (ULP) design techniques and topologies suitable to operation in energy autonomous sensor nodes for the IoT. For each functional blocks (amplifiers, references, oscillators, A/D and D/A converters, etc...) the main ULV/ULP design tradeoffs and figures-of-merit (FOMs) will be first introduced. Then, an overview of emerging design techniques and circuit topologies will be given.
Analog IC design fundamentals.
1) Introduction (1h)
Low-voltage, low-power analog and mixed signal design challenges and concepts. IoT requirements.
2) Amplifiers (6h)
- Overview on performance benchmarks and figures of merit (FOMs)
- ULV/ULP limitations of standard topologies;
- bulk-driven topologies;
- Inverter-based amplifiers, Nauta circuit;
- Multi-stage amplifiers and frequency compensation issues;
- Ring amplifiers;
- Dynamic amplifiers;
- VCO-based amplifiers;
- digital amplifiers.
2) Voltage/current references and regulators (5h)
- Overview on performance benchmarks and figures of merit (FOMs)
- ULV/ULP references, Zero Temperature Coefficient (ZTC) point
- Two-transistor references. (Seok reference)
- Virtual references
- Digital LDO
3) Wake-up timers and oscillators (1h)
4) Digital to analog, Analog-to-digital and X-to-digital converters (7h)
- Overview on performance benchmarks. Walden and Schneider FOMs, Murman's survey
- ULV/ULP Successive Approximation Register (SAR) ADC:
- energy efficient switching sequences
- capacitive DAC design
- threshold comparator: coarse-fine comparators, floating inverter comparators
- ULV/ULP continuous time sigma-delta ADC
- VCO-based ADC
- stochastic flash ADC
- DACs: Sigma-Delta DACs, dynamic element matching (DEM), DDPM DAC; ReDAC
- Capacitance to Digital Converters (CDC)
- Time-to-digital converters
On site
Oral presentation - Team project work development
P.D.2-2 - June
Monday 12th June 2023 from 10.00 to 13.00 - classroom 2C
Wednesday 14th June 2023 from 10.00 to 13.00 - classroom 2C
Friday 16th June 2023 from 10.00 to 13.00 - classroom 2C
Monday 19th June 2023 from 10.00 to 13.00 - classroom 2C
Friday 23th June 2023 from 10.00 to 13.00 - classroom 2C
Monday 26th June 2023 from 10.00 to 13.00 - classroom 2C
Wednesday 28th June 2023 from 10.00 to 13.00 - classroom 2C