PORTALE DELLA DIDATTICA

PORTALE DELLA DIDATTICA

PORTALE DELLA DIDATTICA

Elenco notifiche



Quantum Hardware Design and Optimization and Quantum Computing

01HGHUU

A.A. 2024/25

Course Language

Inglese

Degree programme(s)

Course structure
Teaching Hours
Lezioni 45
Esercitazioni in laboratorio 15
Tutoraggio 15
Lecturers
Teacher Status SSD h.Les h.Ex h.Lab h.Tut Years teaching
Co-lectures
Espandi

Context
SSD CFU Activities Area context
2024/25
The Quantum Hardware Design and Optimization course focuses on the knowledge of a physical qubit and examines the design parameters to be tackled to implement a real Quantum Computer dealing with decoherence and noise when the number of qubits increases. The course covers qubits and their representation on the Bloch sphere, the use of quantum gates, and implementation with Open QASM 2.0 and Qiskit. It explores the design of quantum circuits and introduces quantum algorithms and optimization techniques like QUBO and Ising. The course addresses hardware for quantum gates, including NMR, trapped ions, Josephson junctions, and quantum dots, as well as mapping and optimization specific to hardware. It includes practical exercises on CAD for quantum circuits, digital emulation with FPGA and GPU, VHDL projects, simulations with Modelsim, and testing on platforms.
The Quantum Hardware Design and Optimization course focuses on the knowledge of a physical qubit and examines the design parameters to be tackled to implement a real Quantum Computer dealing with decoherence and noise when the number of qubits increases. The course covers qubits and their representation on the Bloch sphere, the use of quantum gates, and implementation with Open QASM 2.0 and Qiskit. It explores the design of quantum circuits and introduces quantum algorithms and optimization techniques like QUBO and Ising. The course addresses hardware for quantum gates, including NMR, trapped ions, Josephson junctions, and quantum dots, as well as mapping and optimization specific to hardware. It includes practical exercises on CAD for quantum circuits, digital emulation with FPGA and GPU, VHDL projects, simulations with Modelsim, and testing on platforms.
The student wil know how to implement on a hardware basis the quantum gates and circuits; this ability will be deployed on realistic qubits and multi-qubit array both in ideal and non-ideal conditions. The student will develop the ability to simulate functionally simple quantum circuits using simulators available at teaching level. The student will develop the ability to compile quantum algorithms of simple and medium complexity, holding first a solid methodology independently on the type of algorithm. The student will develop the ability to implement a general algorithm on Field Programmable Gate Arrays (FPGAs) and to deploy quantum algorithms emulator using FPGAs The student will hold the basic skills to integrate classical and quantum electronic architectures in an embedded or coherently interfaced hardware support.
The student wil know how to implement on a hardware basis the quantum gates and circuits; this ability will be deployed on realistic qubits and multi-qubit array both in ideal and non-ideal conditions. The student will develop the ability to simulate functionally simple quantum circuits using simulators available at teaching level. The student will develop the ability to compile quantum algorithms of simple and medium complexity, holding first a solid methodology independently on the type of algorithm. The student will develop the ability to implement a general algorithm on Field Programmable Gate Arrays (FPGAs) and to deploy quantum algorithms emulator using FPGAs The student will hold the basic skills to integrate classical and quantum electronic architectures in an embedded or coherently interfaced hardware support.
The student is expected to have knowledges on: Quantum information processing in terms of methods and tools Fundamentals of Quantum algebra, both at theoretical and practical level, i.e. should be able to follow quantum algebra demonstrations and to solve basic problems using quantum algebra methods Qubit technology both in terms of materials and processes, and single qubit physical implementation based on the major existing technologies Criteria, problems and circuits for interfacing qubit devices and gates to standard technologies for driving and reading Fundamentals of Quantum algorithms
The student is expected to have knowledges on: Quantum information processing in terms of methods and tools Fundamentals of Quantum algebra, both at theoretical and practical level, i.e. should be able to follow quantum algebra demonstrations and to solve basic problems using quantum algebra methods Qubit technology both in terms of materials and processes, and single qubit physical implementation based on the major existing technologies Criteria, problems and circuits for interfacing qubit devices and gates to standard technologies for driving and reading Fundamentals of Quantum algorithms
Universal set of gates for QC, Di Vincenzo's Criteria and hardware implementation of quantum gates and circuits on realistic qubits and multi-qubit array: ideal, non-ideal conditions, noise impact, temperature and defects. [1CFU] Design of quantum circuits [1CFU]: • Basic quantum algorithms implementation based on quantum gates • Compilation of quantum circuits tailored for actual hardware specifications and comparison with classical compilation processes • Technology-dependent gate optimizations and two-qubit gate templates • Basics on CAD design for quantum circuits Functional comparison through models and simulations of NMR qubits, Josephson Junction qubits, Trapped ions qubits and Quantum Dots qubits [1CFU] Quantum computing emulation and integration with classical digital architectures [2CFU]: • Fundamentals of classical digital circuits for FPGA • Design of digital circuits to be synthesized on FPGAs for quantum computing emulation • Simulation and characterization of emulated quantum circuits Deployment of quantum-based algorithms and methodologies on quantum HW through Quadratic Unconstrained Binary Optimization (QUBO) for real-life problems. [1CFU]
Universal set of gates for QC, Di Vincenzo's Criteria and hardware implementation of quantum gates and circuits on realistic qubits and multi-qubit array: ideal, non-ideal conditions, noise impact, temperature and defects. [1CFU] Design of quantum circuits [1CFU]: • Basic quantum algorithms implementation based on quantum gates • Compilation of quantum circuits tailored for actual hardware specifications and comparison with classical compilation processes • Technology-dependent gate optimizations and two-qubit gate templates • Basics on CAD design for quantum circuits Functional comparison through models and simulations of NMR qubits, Josephson Junction qubits, Trapped ions qubits and Quantum Dots qubits [1CFU] Quantum computing emulation and integration with classical digital architectures [2CFU]: • Fundamentals of classical digital circuits for FPGA • Design of digital circuits to be synthesized on FPGAs for quantum computing emulation • Simulation and characterization of emulated quantum circuits Deployment of quantum-based algorithms and methodologies on quantum HW through Quadratic Unconstrained Binary Optimization (QUBO) for real-life problems. [1CFU]
The course consists of theoretical lectures and an application part based on exercises carried out in the laboratory with the aid of electronic boards and computer systems. The experimental exercises involve the design of basic blocks defined starting from elementary cells and the analysis of their performance using simulators. They then foresee the description of more complex architectures through VHDL language. During lab hours, students will work on some guided exercises and collaborate in groups on several projects. Lab assessments will be conducted on-site by the instructors, who will ask questions about the execution of the various tasks. Laboratory groups will be composed of 3/4 students.
The course consists of theoretical lectures and an application part based on exercises carried out in the laboratory with the aid of electronic boards and computer systems. The experimental exercises involve the design of basic blocks defined starting from elementary cells and the analysis of their performance using simulators. They then foresee the description of more complex architectures through VHDL language. During lab hours, students will work on some guided exercises and collaborate in groups on several projects. Lab assessments will be conducted on-site by the instructors, who will ask questions about the execution of the various tasks. Laboratory groups will be composed of 3/4 students.
Suggested books: • Quantum Computation and Quantum Information, M. Nielsen and I. Chuang, Cambridge University Press • Quantum Computing for Computer Scientist, Yanofky, Mannucci, Cambridge University press • Introduction to Classical and Quantum Computing, T. Wong • Advanced Digital System Design using SoC FPGAs: An Integrated Hardware/Software Approach, R.K. Snider, Springer Copies of the slides used for the lectures and the manuals for the laboratory exercises are available. All the course material can be downloaded through the teaching portal.
Suggested books: • Quantum Computation and Quantum Information, M. Nielsen and I. Chuang, Cambridge University Press • Quantum Computing for Computer Scientist, Yanofky, Mannucci, Cambridge University press • Introduction to Classical and Quantum Computing, T. Wong • Advanced Digital System Design using SoC FPGAs: An Integrated Hardware/Software Approach, R.K. Snider, Springer Copies of the slides used for the lectures and the manuals for the laboratory exercises are available. All the course material can be downloaded through the teaching portal.
Slides; Esercitazioni di laboratorio;
Lecture slides; Lab exercises;
Modalità di esame: Prova scritta (in aula);
Exam: Written test;
... The exam will consist of a written test lasting two hours. The written exam will include questions and exercises, from which the understanding of the concepts and the maturity managed to elaborate on them are assessed. The part linked to the laboratories weighs 20% of the final evaluation, while the exam weighs 80%. The lab assessment methods are detailed in the 'Course Structure' section.
Gli studenti e le studentesse con disabilità o con Disturbi Specifici di Apprendimento (DSA), oltre alla segnalazione tramite procedura informatizzata, sono invitati a comunicare anche direttamente al/la docente titolare dell'insegnamento, con un preavviso non inferiore ad una settimana dall'avvio della sessione d'esame, gli strumenti compensativi concordati con l'Unità Special Needs, al fine di permettere al/la docente la declinazione più idonea in riferimento alla specifica tipologia di esame.
Exam: Written test;
The exam will consist of a written test lasting two hours. The written exam will include questions and exercises, from which the understanding of the concepts and the maturity managed to elaborate on them are assessed. During the exam, it is not permitted to consult books or other materials. The part linked to the laboratories weighs 20% of the final evaluation, while the exam weighs 80%. The lab assessment methods are detailed in the 'Course Structure' section.
In addition to the message sent by the online system, students with disabilities or Specific Learning Disorders (SLD) are invited to directly inform the professor in charge of the course about the special arrangements for the exam that have been agreed with the Special Needs Unit. The professor has to be informed at least one week before the beginning of the examination session in order to provide students with the most suitable arrangements for each specific type of exam.
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