The course is taught in English. Mandatory course for Laurea Magistrale in Computer Science Engineering, in the first year and first semester of the course. The purpose of the course is to provide a better knowledge on the elaboration system architecture, with a particular attention to microprocessor based systems. The course analyzes the several components of an elaboration system: from the microprocessor internal architecture, up to system bus for peripheral devices management.

- Knowledge of several processor architectures, with particular attention paid to x86, ARM and MIPS families - Superscalar and multithread architectures - Knowledge of the sw/hw architecture of an embedded system - Knowledge about system bus, cpu and I/O characteristics - Competences about I/O management and interface design - Competences about development of applications for embedded systems - Assembly code implementation for I/O device management.

- Knowledge of basic elaboration systems architecture: processor structure, memory organization and peripheral management - Knowledge of basic functionalities of operative systems - Capability to develop programs in assembler language.

• Advanced description of the basic microprocessor architecture • Introduction to modern microprocessor architectures • CISC, RISC and superscalar processor architectures, behavior and performance • Microprocessor-based systems architecture • Development flow of embedded system applications using a development board • Advanced programming techniques for embedded systems: theory and practice • Advanced assembly programming techniques (ARM, 8086): theory and practice.

ADDITIONAL EXAM INFO, COMMON TO ALL MODES (ANY MINOR CHANGES TO THESE POLICIES/PROCEDURES WILL BE TIMELY COMMUNICATED TO THE STUDENTS) • The exam consists of a 2 –sections written part, i.e, one where some responses on the topics covered by professor Sonza have to be provided and a second one where it will be requested to write one or more programs in the assembly language (ARM and 8086), plus a mandatory oral part, which will take place in the next days following the written part. • In the very few days after the written part, the students have to self-correct their assembly program(s), starting from the solution completed during the written part. Fully functional program(s) have to be obtained together with a .doc list of all the changes with respect to the written version part. Both the .txt file of the new running version(s) and the .doc with the list(s) of changes, have to be uploaded to Portale della Didattica by a unique deadline common to all students, which will be timely communicated. Later uploads will not be considered and the exam will be voided (even in the case of no changes, the students have to upload the necessary and requested files). After their upload, students will not be allowed to further change their files. • If the list of modified changes does not match with the effectively implemented changes and in case of other/similar anomalies, the correction of the programming part will lead to a zero-score. In any case, compliance checks could be run offline by Professors and, in case anomalies are found, a zero-score will be recorded. • The first part globally accounts up to 27 points at most, i.e., up to 19 points for the second section (as evaluated during the oral discussion), plus 8 for the first section. In order to pass the written part and go for the mandatory oral, it is necessary that all the following conditions are met: o The first section score is at least 4 points o Global ARM program(s) evaluation has achieved at least 50% of the overall score available for the ARM part o Global 8086 program(s) evaluation has achieved at least 50% of the overall score available for the 8086 part o The second section (i.e., ARM+8086 programs) score is at least 10 points o The first section plus second section score is at least 16 points • The oral questions following the program(s) discussion, can decrease by any amount the first part score, or add up to 6 additional points • Usually but depending on the time constraints, the list of students who successfully passed the written part minimum threshold will be posted on course’s page in Portale della Didattica together with the instructions about how to have the oral exam, which will cover all the program but not the laboratories. • Failure to respond in a sufficient way can at any time lead to a rejection, which has not necessarily to be communicated immediately, but in general will follow the general protocol to communicate the results through Portale della Didattica. • No partial scores will be communicated to the students during any part of the written/oral parts. The final scores will be made available some days after the end of the last oral exam, through portale della didattica in the personal page of each student, as “partial score”. A student can request the rejection of the score by 12 noon CET of the day after the partial scores have been published or at the time which will be communicated through Portale della Didattica. Later requests will be neither considered nor responded. • Please refer to the file "flow" for the detailed explanation about the policies and procedures on remote and in-person exams. • All exam parts run in remote mode (written and oral) will be video-recorded; students who do not want to be video-recorded unfortunately will not be admitted to the exam.

• Class lectures: 50% of the course duration • Extensive Class exercise time: 30% of the course duration • Assisted laboratories: 20% of the course duration. Students are highly invited to interact with Lecturers, at lecture, exercise, and laboratory slots

• J.L. Hennessy, D.A. Patterson, Computer Architecture: a Quantitative Approach, Morgan Kaufmann Publishers, Inc., VI Edition, 2017 • Steve Furber, ARM system-on-chip architecture, Addison-Wesley, 2000. Optional additional material provided by the Lecturers.

Slides; Esercitazioni di laboratorio;

Modalità di esame: Test informatizzato in laboratorio; Prova orale facoltativa; Elaborato progettuale individuale;

Exam: Computer lab-based test; Optional oral exam; Individual project;

... The exam consists of a written plus a (mandatory) oral part. The written part is further divided into two sub-parts: 1. The first sub-part consists of open&closed questions about subjects covered during lectures. While this sub-part is being run, it is not possible to use any book or other material. Max score = 8 points; minimum score to have this first sub-part passed = 4 points. 2. The second sub-part consists of the development of an assembly program. While this sub-part is being run, it is possible to use only printed books and/or documents in electronic format downloaded from the web site of the course (Portale della Didattica). Maximum score = 18 points; minimum score to have this second sub-part passed = 10 points. The written part (=first+second sub-parts) lasts from 2 to 3 hours and has to be passed in both its two sub-parts. Failing one of the two sub-parts will imply a rejection. The correction of the written tests takes place during the oral part; the presence of the student is required, otherwise his/her vote will be rejected / refused. Points in the two parts are added up. At the end of the correction, the student will be able to continue the oral exam, consisting of at most three additional questions adding up to 8 more points. The first oral question (max 3 points) will be, by definition, always on laboratory exercises, while the other two will cover in full the course's program. Failure to satisfactorily responding a question, will imply a negative score for that question and the possible termination of the oral exam. If less than 18 points are obtained, a rejection will be registered. Professor(s) has (have) the right to ask at any time oral questions to get a better and more complete picture of the student's preparation. The final grade will be determined by adding up all the points collected by the student and rounding the numerical result. Laude will be granted to all students whose number of points exceeds 31.5 (before rounding). Overall, the exam is targeted at evaluating the students both from their abilities to design, write and run assembly programs, and their knowledge of modern computing systems architectures.

Gli studenti e le studentesse con disabilità o con Disturbi Specifici di Apprendimento (DSA), oltre alla segnalazione tramite procedura informatizzata, sono invitati a comunicare anche direttamente al/la docente titolare dell'insegnamento, con un preavviso non inferiore ad una settimana dall'avvio della sessione d'esame, gli strumenti compensativi concordati con l'Unità Special Needs, al fine di permettere al/la docente la declinazione più idonea in riferimento alla specifica tipologia di esame.