PORTALE DELLA DIDATTICA

PORTALE DELLA DIDATTICA

PORTALE DELLA DIDATTICA

Elenco notifiche



Digital Electronics Design

01GYBYF, 01GYBLM

A.A. 2026/27

Course Language

Inglese

Degree programme(s)

1st degree and Bachelor-level of the Bologna process in Ingegneria Informatica (Computer Engineering) - Torino

Course structure
Teaching Hours
Lecturers
Teacher Status SSD h.Les h.Ex h.Lab h.Tut Years teaching
Co-lectures
Espandi

Context
SSD CFU Activities Area context
ING-INF/01 8 B - Caratterizzanti Ingegneria elettronica
2025/26
This course aims to teach the techniques of analysis and design of digital electronic circuits. It introduces students to a digital hardware description language and the tools that use this language for the simulation and implementation of digital electronic systems. Starting from the basic components and their manufacturing technology, it leads the student to understand the circuits and digital systems that use these components.
This course aims to teach the techniques of analysis and design of digital electronic circuits. It introduces students to a digital hardware description language and the tools that use this language for the simulation and implementation of digital electronic systems. Starting from the basic components and their manufacturing technology, it leads the student to understand the circuits and digital systems that use these components.
Ability to analyze and design digital circuits and systems of limited complexity. Understanding the characteristics of components and devices. Ability to describe a digital system using the Verilog hardware description language. Knowledge of the different implementation techniques and design flows for electronic systems, with the related parameters (speed, power, cost) and characteristics.
Ability to analyze and design digital circuits and systems of limited complexity. Understanding the characteristics of components and devices. Ability to describe a digital system using the Verilog hardware description language. Knowledge of the different implementation techniques and design flows for electronic systems, with the related parameters (speed, power, cost) and characteristics.
Circuit analysis in the time domain and in the frequency domain; first order RC circuits; Boolean algebra
Circuit analysis in the time domain and in the frequency domain; first order RC circuits; Boolean algebra
Elementary logic gates and circuits (10 hours) - Boolean logic fundamentals - Combinational gates: NAND, NOR, NOT, AND, OR, XOR, MUX - Gate properties: functional description, truth table, symbol, Boolean function - Sequential gates: flip-flops, latches, registers - Counters and FSMs: state diagrams, transition tables Basic circuits and finite state machines (FSM) (15 hours) - Combinational networks: minimization, basic circuit synthesis techniques - Synthesis of elementary FSMs - FSM application examples - Complex control systems (ASM chart) - Control units and data paths, arithmetic circuits Overview of the operating principles of MOS transistors and gates (10 hours) - Structure and operation of MOS transistors - MOS transistor circuit models - CMOS integrated circuit technology - Implementation of CMOS logic gates - Interconnections - Performance characteristics of MOS circuits: speed, power, consumption - Timings, optimizations, clock Memories: circuits, architecture, operation (10 hours) - Categories, definitions - DRAM: structure, operation, signals - SRAM: structure, operation, signals - DRAM-SRAM comparison, memories with multiple gates, CAM, TCAM, typical applications - Non-volatile memories: ROM, EPROM, EEPROM, FLASH, serial memories Hardware Description Languages (Verilog) (15 hours) - Verilog hardware description language: concepts and data structures for the description and simulation of combinational and sequential circuits - ROM and SRAM description in Verilog - Introduction to testbenches - Examples of Verilog description and simulation VLSI circuit design and manufacturing flow (10 hours) - Introduction to integrated circuits and VLSI technologies, Moore Law - VLSI design phases: logic level, RTL synthesis, simulation, place&route, physical verification - Design automation (EDA) - Design flows: full custom, standard cell, FPGA. Demo on FPGA - System aspects (clock generation and distribution, power distribution, interconnections, parallel/serial bus, I/O, I/O strength, PoR) Design and Testing of Digital Electronic Systems (10 hours) - Introduction to A/D and D/A conversion - From system specifications to component specifications - Test - Example of a complex mixed signal processing system
Introduction to Digital Electronics (6 hours) - Information, signals, and systems - Analog vs. digital processing - Elementary digital functions and logic gates - Electrical characteristics of logic gates - Digital behavior modeling and analysis: timing diagrams, propagation delays Combinational logic (7.5 hours) - functional description, truth table, symbol, Boolean function - Minimization of Boolean functions, Karnaugh maps, overview of automatic techniques - combinational blocks, arithmetic circuits Sequential blocks (7.5 hours) - general principles: bistable circuit, metastability - level-triggered vs. edge-triggered blocks: Set-Reset flip-flop, D-latch, D Flip-Flop, JK Flip-Flop - set-up and hold time, timing constraints - registers, FSM (introduction). Digital gates in CMOS technology (15 hours) - CMOS integrated circuit technology - nMOS and pMOS transistors: structure, symbol, and qualitative behavior - Electrical Characteristics of MOS transistors, operating regions - MOS transistor models in digital electronics - CMOS logic gates - Open-drain and three state gates - Interconnections - Performance of CMOS circuits: propagation delay, power consumption - Timings, optimizations, clock Finite state machines (FSM) (15 hours) - Mealy and Moore machines, State Transitions Graphs (STG) - Synthesis of elementary FSMs, sequence detectors - FSM optimization techniques (overview) - FSM design examples - Complex control systems (ASM chart) - Control units and data paths Hardware Description Languages (Verilog) (15 hours) - Verilog hardware description language: concepts and data structures - Verilog description and simulation of combinational and sequential circuits - Introduction to testbenches - Examples of Verilog description and simulation Memories: circuits, architecture, operation (10 hours) - Categories, definitions - DRAM: structure, operation, signals - SRAM: structure, operation, signals - DRAM-SRAM comparison, memories with multiple gates, CAM, TCAM, typical applications - Non-volatile memories: ROM, EPROM, EEPROM, FLASH, serial memories VLSI circuit design and manufacturing flow (4 hours) - Introduction to VLSI technologies, Moore's Law - VLSI design phases: logic level, RTL synthesis, simulation, place&route, physical verification - Design automation (EDA) - Design flows: full custom, standard cell, FPGA. Demo on FPGA
The course is organized into lectures (50 hours), classroom exercises (15 hours) and laboratories (15 hours). The classroom exercises cover the analysis and/or design of digital electronic circuits or systems, related to the topics of the lectures. The aim of the laboratories (whose attendance is voluntary) is to present the concrete application of what is presented in class, through the description (by means of diagrams or languages), simulation and implementation of digital circuits. The lab activities are evaluated in the written exam.
The course is organized into lectures (50 hours), classroom exercises (15 hours) and laboratories (15 hours). The classroom exercises cover the analysis and/or design of digital electronic circuits or systems, related to the topics of the lectures. The aim of the laboratories (whose attendance is voluntary) is to present the concrete application of what is presented in class, through the description (by means of diagrams or hardware description languages), simulation and implementation of digital circuits.
Fundamentals of Digital Logic with Verilog Design, 3rd Edition By Stephen Brown and Zvonko Vranesic © 2014 ISBN10: 0073380547 | ISBN13: 9780073380544 https://www.mheducation.com/highered/product/fundamentals-digital-logic-verilog-design-brown-vranesic/M9780073380544.html
Fundamentals of Digital Logic with Verilog Design, 3rd Edition By Stephen Brown and Zvonko Vranesic © 2014 ISBN10: 0073380547 | ISBN13: 9780073380544 https://www.mheducation.com/highered/product/fundamentals-digital-logic-verilog-design-brown-vranesic/M9780073380544.html
Slides; Esercizi; Esercitazioni di laboratorio; Strumenti di simulazione;
Lecture slides; Exercises; Lab exercises; Simulation tools;
Modalità di esame: Prova orale facoltativa; Prova scritta in aula tramite PC con l'utilizzo della piattaforma di ateneo;
Exam: Optional oral exam; Computer-based written test in class using POLITO platform;
... The final exam verifies the acquisition of the following skills: - Knowledge and understanding of the course topics. - Ability to apply theory and calculation to solve problems. The written test can last up to 2 hours. It consists of several open-ended problems and multiple-choice questions covering all the topics of the course, including the laboratory. The problems test the knowledge and understanding of the topics presented in the course (lectures, exercises and labs). In particular, they test the student's ability to select, combine and apply theory, including calculations, engineering decisions and Verilog code writing, to solve simple and practical problems often similar to those typically encountered in the design of electronic circuits and systems. The multiple-choice questions test the knowledge and understanding of all the topics of the course. Each question has four pre-defined answers. Even if only one answer is correct, all are designed to appear plausibly correct, unless the student has a thorough understanding of the course material. Correct answers are worth 1 point each, while incorrect answers are worth 0 points each. During the exam, it is not permitted to use external sources of information (slides, notes, books, phones, other people, headphones, programmable calculators, etc.). Only non-programmable calculators, PCs (notebooks) on which the exam is held, and the Verilog primer provided by the teacher are permitted. The maximum score for the written exam is 31 points. At least 18 points are required to pass the written exam. Only students who have passed the written exam may apply to be admitted to an optional oral exam. This consists of theoretical questions or simple problems to solve and discussions on related topics, and is designed to test the acquisition of the same skills as the written exam. The oral exam will be scored from -3 to 3 points. The score of the oral exam is then algebraically added to the score of the written exam. If the total score of the written and oral exam is at least 18 points, the exam is passed with the resulting grade. If the score is lower than 18 points, the exam is not passed. A final score higher than 30.5 adds honors to the maximum score of 30. To dispel any doubts about the written exam, the teacher may request an oral exam to verify the knowledge demonstrated in the written exam. The structure and evaluation of this oral exam will be the same as the one requested by the student, but in this case the outcome may either confirm the grade of the written exam or reduce it by any number of points.
Gli studenti e le studentesse con disabilità o con Disturbi Specifici di Apprendimento (DSA), oltre alla segnalazione tramite procedura informatizzata, sono invitati a comunicare anche direttamente al/la docente titolare dell'insegnamento, con un preavviso non inferiore ad una settimana dall'avvio della sessione d'esame, gli strumenti compensativi concordati con l'Unità Special Needs, al fine di permettere al/la docente la declinazione più idonea in riferimento alla specifica tipologia di esame.
Exam: Optional oral exam; Computer-based written test in class using POLITO platform;
The final exam verifies the acquisition of the following skills: - Knowledge and understanding of the course topics. - Ability to apply theory and calculation to solve problems. The written test can last up to 2 hours. It consists of 15-20 multiple-choice questions and/or problems requiring numerical answers, and it covers all the topics of the course. The multiple-choice questions test the knowledge and understanding of all the topics of the course. Each question has four pre-defined answers. Even if only one answer is correct, all are designed to appear plausibly correct, unless the student has a thorough understanding of the course material. Correct answers are worth 1 point each, while incorrect answers are worth 0 points each. The problems test the knowledge and understanding of the topics presented in the course (lectures, exercises). In particular, they test the student's ability to select, combine and apply theory, including calculations, engineering decisions and Verilog code writing, to solve simple and practical problems often similar to those typically encountered in the design of electronic circuits and systems. During the exam, it is not permitted to use external sources of information (slides, notes, books, phones, other people, headphones, programmable calculators, etc.). Only non-programmable calculators, PCs (notebooks) on which the exam is held. The maximum score for the written exam is 31 points. At least 18 points are required to pass the written exam. Only students who have passed the written exam with more than 24 points may apply to be admitted to an optional oral exam. This consists of theoretical questions or simple problems to solve and discussions on related topics, and is designed to test the acquisition of the same skills as the written exam. The oral exam will be scored from -3 to 3 points. The score of the oral exam is then algebraically added to the score of the written exam. If the total score of the written and oral exam is at least 18 points, the exam is passed with the resulting grade. If the score is lower than 18 points, the exam is not passed. A final score higher than 30.5 adds honors to the maximum score of 30. To dispel any doubts about the written exam, the teacher may request an oral exam to verify the knowledge demonstrated in the written exam. The structure and evaluation of this oral exam will be the same as the one requested by the student, but in this case the outcome may either confirm the grade of the written exam or reduce it by any number of points.
In addition to the message sent by the online system, students with disabilities or Specific Learning Disorders (SLD) are invited to directly inform the professor in charge of the course about the special arrangements for the exam that have been agreed with the Special Needs Unit. The professor has to be informed at least one week before the beginning of the examination session in order to provide students with the most suitable arrangements for each specific type of exam.
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