Master of science-level of the Bologna process in Nanotechnologies For Icts - Torino/Grenoble/Losanna Master of science-level of the Bologna process in Ingegneria Elettronica (Electronic Engineering) - Torino Master of science-level of the Bologna process in Nanotechnologies For Icts (Nanotecnologie Per Le Ict) - Torino/Grenoble/Losanna Master of science-level of the Bologna process in Ingegneria Elettronica (Electronic Engineering) - Torino
The course is taught in English.
The course aims at providing a solid knowledge on the operation of the main semiconductor devices for the micro and nanoelectronics applications. The first part of the course is dedicated to the evolution of the MOS transistor technology, with emphasis on the CMOS applications. The FinFET transistor is addressed both from the technological and the modeling standpoint. The second part of the course is dedicated to emerging nanoelectronic devices, with particular emphasis on CMOS replacement and novel memory/storage devices, including the junctionless transistors, the tunneling transistors and lower dimensionality structures.
The course provides the fundamentals for understanding the devices operation, starting from their physical structure and using the concepts of the semiconductor physics. The devices are analyzed at all levels, starting from the fabrication process, the modeling and simulation through CAD tools, highlighting the problems related to non-idealities and scaling issues.
The course is taught in English.
The course aims at providing a solid knowledge on the operation of the main semiconductor devices for the micro and nanoelectronics applications. The first part of the course is dedicated to the evolution of the MOS transistor technology, with emphasis on the CMOS applications. The FinFET transistor is addressed both from the technological and the modeling standpoint. The second part of the course is dedicated to emerging nanoelectronic devices, with particular emphasis on CMOS replacement and novel memory/storage devices, including the junctionless transistors, the tunneling transistors and lower dimensionality structures.
The course provides the fundamentals for understanding the devices operation, starting from their physical structure and using the concepts of the semiconductor physics. The devices are analyzed at all levels, starting from the fabrication process, the modeling and simulation through CAD tools, highlighting the problems related to non-idealities and scaling issues.
As the outcome of the course, students will be able to
- Analyze the behavior of the micro- and nano- scale devices, including the related problematic linked to geometric scaling and technology fabrication issues
- Identify the correct models for representation of the electron device behavior, both through analytic/compact models anfd through technology CAD software (Synopsys Sentaurus).
- Include the main non-ideality effects into the models (high field, multi-dimensionality, quantum effects, quantum confinement), and link their solution to the main developments of the fabrication technology.
- Identify the correct modeling approach for the nano-scale devices
- Orient their knowledge and future work within the scenario of the nanoelectronic device research field, with solid background on the problems that still need for solution, the future needs and expected developments both at the technology level and in the area of advanced modeling.
As the outcome of the course, students will be able to
- Analyze the behavior of the micro- and nano- scale devices, including the related problematic linked to geometric scaling and technology fabrication issues
- Identify the correct models for representation of the electron device behavior, both through analytic/compact models and through technology CAD software (Synopsys Sentaurus).
- Include the main non-ideality effects into the models (high field, multi-dimensionality, quantum effects, quantum confinement), and link their solution to the main developments of the fabrication technology.
- Identify the correct modeling approach for the nano-scale devices
- compare planar MOSFETs, FinFETs and selected emerging devices, identifying their main advantages, limitations and potential applications
- Interpret and critically evaluate simulation results and clearly communicate the adopted methodology, assumptions, results and conclusions
- Orient their knowledge and future work within the scenario of the nanoelectronic device research field, with solid background on the problems that still need for solution, the future needs and expected developments both at the technology level and in the area of advanced modeling
Students must already have a solid background on the semiconductor physics, and in particular on the drift-diffusion model. Furthermore they must have previous knowledge on the fundamental operation of electron devices and in particular of the MOS transisitor.
Students must already have a solid background on the semiconductor physics, and in particular on the drift-diffusion model. Furthermore they must have previous knowledge on the fundamental operation of electron devices and in particular of the MOS transisitor.
- Technology roadmaop and physical limitations of miniaturization. Scenario of the micro- an nano-electronics. (0.45 credits).
- Advanced modelling for the MOS transistor. (0.9 credits)
- Submicron MOSFET: scaling and nonidealities issues (0.9 credits)
- FinFETs (0.6 credits)
- Junctionless, Tunneling and Negative Capacitance transistors (0.6 credits)
- Emerging technologies (0.6 credits)
- Assisted laboratory practice using a commercial CAD tool for the physics-based simulation of semiconductor devices. (1.95 credits)
- Technology roadmaop and physical limitations of miniaturization. Scenario of the micro- an nano-electronics. (0.45 credits).
- Advanced modelling for the MOS transistor. (0.9 credits)
- Submicron MOSFET: scaling and nonidealities issues (0.9 credits)
- FinFETs (0.6 credits)
- Junctionless Nano Transistor (JLNT); Tunnel Transistors (TFET) and Ferroelectric/Negative Capacitance transistors (FeFET, NEGFET) (1 credits)
- Emerging technologies (0.2 credits)
- Assisted laboratory practice using a commercial CAD tool for the physics-based simulation of semiconductor devices. (1.95 credits)
Technical notes on the course for CORONA emergency.
Remote teaching:
- Lesson: lessons will be partly offline (theory and demonstrations) and partly interactive using the Virtual Classroom Platform (question and answers, exercise).
- LAB: LAB will be entirely online using the Virtual Classroom Platform. The group members can interact and work collectively using the Virtual Classroom breakout rooms. A server is available for simulations.
Blended teaching:
- Lesson: lessons will be partly offline (theory and demonstrations) and partly on site (Politecnico campus) for Q&A and exercise. The on-site lessons will be in any case available also remotely.
- LAB: LAB will be partly in the LED facilities of Politecnico and partly online using the Virtual Classroom Platform. Even during the on-site labs, those, who cannot attend, will be able to interact and work both individually and collectively with their group mates using the Virtual Classroom platform. A server is available for simulations.
To assist the theory part, teachers notes will be made available for individual study.
Technical notes on the course for CORONA emergency.
Remote teaching:
- Lesson: lessons will be partly offline (theory and demonstrations) and partly interactive using the Virtual Classroom Platform (question and answers, exercise).
- LAB: LAB will be entirely online using the Virtual Classroom Platform. The group members can interact and work collectively using the Virtual Classroom breakout rooms. A server is available for simulations.
Blended teaching:
- Lesson: lessons will be partly offline (theory and demonstrations) and partly on site (Politecnico campus) for Q&A and exercise. The on-site lessons will be in any case available also remotely.
- LAB: LAB will be partly in the LED facilities of Politecnico and partly online using the Virtual Classroom Platform. Even during the on-site labs, those, who cannot attend, will be able to interact and work both individually and collectively with their group mates using the Virtual Classroom platform. A server is available for simulations.
To assist the theory part, teachers notes will be made available for individual study.
4 credits of theoretical lessons. 2 credits of assisted CAD laboratory practice using a commercial CAD tool for the physics-based simulation of semiconductor devices. There will be two LAB groups, following the same introduction part (advanced CMOS) and a different second part on specific applications: one LAB group will be dedicated to FinFETs; the other to selected beyond CMOS nanodevices.
4 credits of theoretical lessons.
2 credits of assisted CAD laboratory practice using a commercial CAD tool for the physics-based simulation of semiconductor devices.
Theoretical lessons structure
The theory topics will be covered in class and with the aid of slides. All slides are provided in advance.
LAB sturucture and description
The laboratory activities are carried out in groups. The Lab attendence is mandatory and absences must be communicated and agreed with the professors. Only for Erasmus students or working students specific activities will be proposed to substitute the group activity in presence.
The first 4 labs will be common to all students, including advanced CMOS and FinFETs. In the last 2 labs each group will be assigned a specific topic on advanced technologies, either advanced FinFETs or other selected beyond CMOS nanodevices.
The six laboratory sessions lead to five group reports, since a unique report covers the activities performed during the last two consecutive laboratory sessions.
Submission of all five reports is compulsory. One member of each group must submit the report on behalf of the whole group through the course website. Each report must clearly identify all group members.
The submission deadlines will be published on the course website no later than the beginning of the laboratory activities and will also be announced in class. As far as practicable, the deadlines will be scheduled taking into account the major laboratory deadlines of the other courses offered in the same semester.
Each report must document the simulation setup, the physical models and assumptions adopted, the results obtained and their physical interpretation. Any justified exception to a submission deadline must be agreed with the teaching staff before the deadline.
Lab reports are evaluated according to the correctness and completeness of the simulation setup, the appropriate use of physical models, the quality and clarity of the presented results, and the critical interpretation of the simulations. The report score is common to all members of the group.
The lab report mark is up to 5 points.
Reference textbook:
Yuan Taur, Tak H. Ning
Fundamentals of modern VLSI devices
Cambridge University Press 2nd edition
Teaching material from the professor:
- Review of the semiconductor physics required as the background knowledge for this course (self-learning)
- Course slides
- Guidelines for the lab work
-Further material for advanced topics
Reference textbook:
Yuan Taur, Tak H. Ning
Fundamentals of modern VLSI devices
Cambridge University Press 2nd edition
Teaching material from the professor:
- Review of the semiconductor physics required as the background knowledge for this course (self-learning)
- Course slides
- Course notes available online for 1) FinFETs 2) TFETs. The notes are written by the professor specifically for this course and include all the details of the device operating principle, theretical analysis and the derivation of the formulas provided in the slides.
- Guidelines for the lab work
- Selected papers on advanced device concepts and IEEE Standards (IRDS)
Slides; Video lezioni tratte da anni precedenti;
Lecture slides; Video lectures (previous years);
Modalita di esame: Prova orale obbligatoria; Elaborato progettuale in gruppo;
Exam: Compulsory oral exam; Group project;
...
The final exam consists of an oral exam (30 min.) and a laboratory test (15 min.). The oral exam aims at assessing the knowledge of the theoretical part whereas the laboratory test is aimed at assessing the capability gained in the numerical simulation of advanced electron devices. The Lab test includes always the discussion of the laboratory reports prepared in groups. The oral exam vote is up to 25. The lab vote, up to 5 points, summarizes the evaluation of the written laboratory reports (group-wise) and the individual lab exam. The exam is passed only if both the oral and lab parts are sufficient.
Gli studenti e le studentesse con disabilita o con Disturbi Specifici di Apprendimento (DSA), oltre alla segnalazione tramite procedura informatizzata, sono invitati a comunicare anche direttamente al/la docente titolare dell'insegnamento, con un preavviso non inferiore ad una settimana dall'avvio della sessione d'esame, gli strumenti compensativi concordati con l'Unita Special Needs, al fine di permettere al/la docente la declinazione piu idonea in riferimento alla specifica tipologia di esame.
Exam: Compulsory oral exam; Group project;
The final exam consists of an oral exam (30 min.) and an oral discussion on laboratory activity (15 min.).
Oral exam
The oral exam aims at assessing the knowledge of the theoretical part, targeting the course learning outcomes. In particular, It assesses the student's ability to explain the operating principles of micro- and nanoelectronic devices, analyze scaling and non-ideality effects, compare different device technologies, and select and justify appropriate physical and mathematical models. The assessment considers the correctness and completeness of the answers, the ability to establish connections among device structure, fabrication technology, models and electrical behavior, and the clarity of the presentation.
Laboratory discussion
The laboratory assessment is based on the five laboratory reports prepared in groups and on an individual oral discussion of the laboratory activities, lasting approximately 15 minutes. The lab exam is aimed at assessing the capability gained in the numerical simulation of advanced electron devices. The Lab test always includes the discussion of the laboratory reports prepared in groups, but it aims at assessing the maturity gained by each student of the group. Each student must demonstrate personal understanding of the activities performed and the ability to justify the selected models and simulation settings, interpret the results, and discuss the physical limitations and non-idealities of the simulated devices.
The individual discussion can confirm the lab mark, enhance or lower it, according to the maturity demonstrated by each student.
Final mark composition
The oral exam vote is up to 30 and will be renormalized to 25. The oral exam can be passed only with an oral mark (before normalization) > 15/30.
The lab vote, up to 5 points, is appointed as expalined in the Laboratory discussion part. The exam is passed only if the lab mark is >2.5.
The final mark is the sum of the normalized oral exam mark and the lab mark.
Lode may be awarded to students who achieve full marks and demonstrate outstanding knowledge, autonomy and critical thinking in both the theoretical and laboratory components.
In addition to the message sent by the online system, students with disabilities or Specific Learning Disorders (SLD) are invited to directly inform the professor in charge of the course about the special arrangements for the exam that have been agreed with the Special Needs Unit. The professor has to be informed at least one week before the beginning of the examination session in order to provide students with the most suitable arrangements for each specific type of exam.