The Quantum Hardware Design and Optimization course focuses on the knowledge of a physical qubit and examines the design parameters to be tackled to implement a real Quantum Computer dealing with decoherence and noise when the number of qubits increases.
The course covers qubits and their representation on the Bloch sphere, the use of quantum gates, and implementation with Open QASM 2.0 and Qiskit. It explores the design of quantum circuits and introduces quantum algorithms and optimization techniques like QUBO and Ising.
The course addresses hardware for quantum gates, including NMR, trapped ions, Josephson junctions, and quantum dots, as well as mapping and optimization specific to hardware. It includes practical exercises on CAD for quantum circuits, digital emulation with FPGA and GPU, VHDL projects, simulations with Modelsim, and testing on platforms.
This module provides an engineering oriented introduction to quantum hardware design and optimization, with the aim of connecting the abstract model of quantum computation to the physical constraints of real devices. The module introduces the main concepts required to understand how quantum information is represented, manipulated, and implemented on hardware platforms, starting from the transition from classical to quantum computing and from the properties of qubits, quantum gates, and multi qubit systems. It also addresses the physical and technological requirements for quantum computation, including coherence time, gate time, gate fidelity, initialization, controllability, and measurement.
The module develops the design flow from classical and reversible logic to quantum circuits, including Bloch sphere representation, one qubit and two qubit gates, quantum arithmetic circuits, oracles, programming tools, and hardware aware compilation. Particular attention is devoted to the physical implementation of quantum gates in different technologies, including Nuclear Magnetic Resonance (NMR), quantum dots, superconducting qubits, and trapped ions, and to the translation of high level circuit descriptions into technology dependent native operations. The module also introduces mapping and routing under hardware connectivity constraints, technology dependent optimization of quantum circuits, Quadratic Unconstrained Binary Optimization (QUBO) based problem formulations, quantum optimization strategies, and Field Programmable Gate Array FPGA based quantum emulation with digital design concepts and VHDL.
Alongside lectures, the module includes guided laboratory activities on quantum gates, oracle design, hardware specific mapping, Quadratic Unconstrained Binary Optimization (QUBO) formulations, fundamentals of digital hardware description, and quantum circuit emulation on classical digital platforms. The overall objective is to provide students with the conceptual and practical tools needed to analyse quantum hardware platforms, evaluate implementation trade offs, and design simple quantum and quantum inspired solutions under realistic technological constraints.
The student wil know how to implement on a hardware basis the quantum gates and circuits; this ability will be deployed on realistic qubits and multi-qubit array both in ideal and non-ideal conditions.
The student will develop the ability to simulate functionally simple quantum circuits using simulators available at teaching level.
The student will develop the ability to compile quantum algorithms of simple and medium complexity, holding first a solid methodology independently on the type of algorithm.
The student will develop the ability to implement a general algorithm on Field Programmable Gate Arrays (FPGAs) and to deploy quantum algorithms emulator using FPGAs
The student will hold the basic skills to integrate classical and quantum electronic architectures in an embedded or coherently interfaced hardware support.
At the end of the module, students will be able to:
-explain the main differences between classical and quantum computation, with particular reference to superposition, reversibility, probabilistic measurement, and the circuit model of computation;
-describe qubits using Dirac notation and the Bloch sphere representation, and discuss the role of measurement bases, one qubit gates, two qubit gates, entanglement, and multi qubit states;
-analyse the requirements for the physical implementation of a quantum computer, including DiVincenzo style criteria, coherence time, gate time, gate fidelity, initialization, control, and readout;
-explain the principles of reversible logic and relate classical gates, arithmetic circuits, and adders to their quantum counterparts;
design and discuss simple quantum circuits, including oracle based constructions and elementary arithmetic or search related subroutines;
-compare the main hardware technologies for quantum computation, including NMR, quantum dots, superconducting qubits, and trapped ions, in terms of implementation principles, advantages, limitations, connectivity, and native gate sets;
-explain the role of programming and design tools such as Quantum ASeMbly (QASM), quantum circuit composers, simulators, hardware specific mapping tools, and Quantum characterization, verification, and validation (QCVV) methodologies;
-analyse the main stages of quantum compilation, including logic synthesis, layout synthesis, qubit placement, routing, SWAP insertion, and technology dependent optimization;
-formulate simple combinatorial optimization problems in QUBO form and discuss the principles of selected quantum optimization approaches such as Variational Quantum Eigensolver (VQE), QAOA, Grover Adaptive Search (GAS), adiabatic quantum computation, and quantum annealing;
-discuss the role of classical digital design, FPGA based emulation, and VHDL in the implementation and testing of quantum emulation workflows;
-interpret the results of simple simulations, compilations, and laboratory activities, taking into account hardware constraints and non ideal operating conditions.
The student is expected to have knowledges on:
Quantum information processing in terms of methods and tools
Fundamentals of Quantum algebra, both at theoretical and practical level, i.e. should be able to follow quantum algebra demonstrations and to solve basic problems using quantum algebra methods
Qubit technology both in terms of materials and processes, and single qubit physical implementation based on the major existing technologies
Criteria, problems and circuits for interfacing qubit devices and gates to standard technologies for driving and reading
Fundamentals of Quantum algorithms
The student is expected to have knowledges on:
-Quantum information processing in terms of methods and tools
-Fundamentals of Quantum algebra, both at theoretical and practical level, i.e. should be able to follow quantum algebra demonstrations and to solve basic problems using quantum algebra methods
-Qubit technology both in terms of materials and processes, and single qubit physical implementation based on the major existing technologies
Criteria, problems and circuits for interfacing qubit devices and gates to standard technologies for driving and reading
-Fundamentals of Quantum algorithms
-Basic knowledge of Python language
Universal set of gates for QC, Di Vincenzo's Criteria and hardware implementation of quantum gates and circuits on realistic qubits and multi-qubit array: ideal, non-ideal conditions, noise impact, temperature and defects. [1CFU]
Design of quantum circuits [1CFU]:
Basic quantum algorithms implementation based on quantum gates
Compilation of quantum circuits tailored for actual hardware specifications and comparison with classical compilation processes
Technology-dependent gate optimizations and two-qubit gate templates
Basics on CAD design for quantum circuits
Functional comparison through models and simulations of NMR qubits, Josephson Junction qubits, Trapped ions qubits and Quantum Dots qubits [1CFU]
Quantum computing emulation and integration with classical digital architectures [2CFU]:
Fundamentals of classical digital circuits for FPGA
Design of digital circuits to be synthesized on FPGAs for quantum computing emulation
Simulation and characterization of emulated quantum circuits
Deployment of quantum-based algorithms and methodologies on quantum HW through Quadratic Unconstrained Binary Optimization (QUBO) for real-life problems. [1CFU]
The module covers the following topics.
1. Introduction to quantum computing and hardware requirements
From classical to quantum computing. Qubits, probabilistic behaviour, reversibility, no cloning, and the circuit model. Main application areas of quantum computing. DiVincenzo criteria, coherence time, gate time, gate fidelity, and the physical requirements for scalable quantum hardware.
2. Classical logic, reversible logic, and quantum state representation
Review of classical logic gates, Boolean properties, Karnaugh maps, adders, reversible and irreversible gates. Bloch sphere, Pauli matrices, coordinate systems, measurement, and multi qubit state representation.
3. Quantum gates, circuits, and arithmetic structures
One qubit and two qubit gates, entanglement, quantum arithmetic blocks, quantum adder structures, and the translation from classical to quantum circuits.
4. Programming tools, QASM, and oracle based design
Quantum circuit description tools, QASM based programming, simulators and real runs, oracle design, and Grover based reasoning.
5. Physical implementation of quantum gates
Technology specific implementation of single qubit and two qubit gates in NMR, quantum dots, superconducting qubits, and trapped ions. Native gate sets, connectivity constraints, control signals, implementation trade offs, and technology dependent limitations.
6. Hardware aware compilation and optimization
Compilation targets, logic synthesis, layout synthesis, placement, routing, SWAP insertion, control signal generation, circuit metrics, cost functions, and technology dependent optimization strategies.
7. Mathematical optimization and quantum optimization methods
Non-convex and combinatorial optimization problems, QUBO models, VQE, QAOA, GAS, adiabatic quantum computation, quantum annealing, and embedding issues on hardware topologies.
8. Quantum emulation and digital support architectures
FPGA based quantum emulation, VHDL based digital design concepts, and digital support architectures for the emulation and testing of quantum circuits.
Laboratory activities are aligned with the module contents and include quantum gates introduction, oracle design, hardware specific mapping, QUBO formulations, VHDL fundamentals, and quantum circuit emulation.
Laboratory activities are mandatory and attendance will be recorded. Students work in groups of three. Whenever possible, groups should include students with different educational backgrounds in order to promote interdisciplinary collaboration. Laboratory discussions are organised after each activity, and the corresponding evaluation is individual even when the work is carried out in groups.
All teaching materials, including slides, lecture notes, and laboratory documents, will be provided through the teaching portal. Lectures and laboratory sessions will not be recorded. The module may also include seminars and guest contributions; when explicitly indicated by the instructors, the related contents are considered part of the teaching activities and may be included in the assessment.
Access to the server infrastructure used for the laboratory activities will be provided during the first lab session. The server may only be used for educational purposes strictly related to the module. Students are expected to comply with the confidentiality rules applying to course materials and laboratory outputs.
Laboratory activities are mandatory and attendance will be recorded. Students work in groups of three. Whenever possible, groups should include students with different educational backgrounds in order to promote interdisciplinary collaboration. Laboratory discussions are organised after each activity, and the corresponding evaluation is individual even when the work is carried out in groups.
All teaching materials, including slides, lecture notes, and laboratory documents, will be provided through the teaching portal. Lectures and laboratory sessions will not be recorded. The module may also include seminars and guest contributions; when explicitly indicated by the instructors, the related contents are considered part of the teaching activities and may be included in the assessment.
Access to the server infrastructure used for the laboratory activities will be provided during the first lab session. The server may only be used for educational purposes strictly related to the module. Students are expected to comply with the confidentiality rules applying to course materials and laboratory outputs.
The course consists of theoretical lectures and an application part based on exercises carried out in the laboratory with the aid of electronic boards and computer systems.
The experimental exercises involve the design of basic blocks defined starting from elementary cells and the analysis of their performance using simulators. They then foresee the description of more complex architectures through VHDL language.
During lab hours, students will work on some guided exercises and collaborate in groups on several projects. Lab assessments will be conducted on-site by the instructors, who will ask questions about the execution of the various tasks.
Laboratory groups will be composed of 3/4 students.
The module consists of lectures, guided exercises, and laboratory activities. The lectures introduce the theoretical and methodological foundations of quantum hardware design, quantum circuits, physical implementations of gates, hardware aware compilation, optimization models, and digital emulation workflows. Guided exercises are used to consolidate the methods introduced during the lectures and to train students in the analysis of circuits, mappings, optimization formulations, and implementation trade offs.
The laboratory component includes activities on quantum gates, oracle design, mapping quantum circuits for specific hardware, QUBO formulations, VHDL fundamentals, and quantum circuit emulation. Laboratory work is carried out in groups of three students, but the assessment is individual and is based on the submitted material, the discussion of the work, the level of preparation shown during the lab sessions, and attendance. Small projects and practical exercises are also included within the laboratory framework.
Suggested books:
Quantum Computation and Quantum Information, M. Nielsen and I. Chuang, Cambridge University Press
Quantum Computing for Computer Scientist, Yanofky, Mannucci, Cambridge University press
Introduction to Classical and Quantum Computing, T. Wong
Advanced Digital System Design using SoC FPGAs: An Integrated Hardware/Software Approach, R.K. Snider, Springer
Copies of the slides used for the lectures and the manuals for the laboratory exercises are available. All the course material can be downloaded through the teaching portal.
Suggested books:
Quantum Computation and Quantum Information, M. Nielsen and I. Chuang, Cambridge University Press
Quantum Computing for Computer Scientist, N. Yanofsky and M. Mannucci, Cambridge University press
Introduction to Classical and Quantum Computing, T. Wong
Advanced Digital System Design using SoC FPGAs: An Integrated Hardware/Software Approach, R.K. Snider, Springer
Quantum information science, M. Riccardo, and M. Motta, Oxford University Press.
Quantum computing: from linear algebra to physical realizations, M. Nakahara and T. Ohmi, CRC Press
The quantum world of ultra-cold atoms and light book II: the physics of quantum-optical devices, C. Gardiner and P. Zoller, World ScientificCopies of the slides used for the lectures and the manuals for the laboratory exercises are available.
All the course material can be downloaded through the teaching portal.
Slides; Esercizi; Esercitazioni di laboratorio; Strumenti di simulazione;
...
The exam will consist of a written test lasting two hours.
The written exam will include questions and exercises, from which the understanding of the concepts and the maturity managed to elaborate on them are assessed.
The part linked to the laboratories weighs 20% of the final evaluation, while the exam weighs 80%. The lab assessment methods are detailed in the 'Course Structure' section.
Gli studenti e le studentesse con disabilita o con Disturbi Specifici di Apprendimento (DSA), oltre alla segnalazione tramite procedura informatizzata, sono invitati a comunicare anche direttamente al/la docente titolare dell'insegnamento, con un preavviso non inferiore ad una settimana dall'avvio della sessione d'esame, gli strumenti compensativi concordati con l'Unita Special Needs, al fine di permettere al/la docente la declinazione piu idonea in riferimento alla specifica tipologia di esame.
Exam: Written test;
The assessment is designed to verify the achievement of the expected learning outcomes of the module, with particular reference to the understanding of quantum hardware principles, the ability to analyse and design elementary quantum circuits, the capability to discuss technology dependent implementations of quantum gates, the understanding of hardware aware compilation and optimization flows, digital design, and the ability to apply the methods introduced during lectures and laboratory activities.
80% of the final mark: WRITTEN TEST
The final assessment consists of a written test and an individual laboratory evaluation. The written test lasts two hours and includes four open questions and exercises. It is aimed at assessing both theoretical understanding and the ability to apply the concepts developed during the module. Typical questions and exercises may concern quantum computing foundations, quantum gates and circuits, oracles, arithmetic operators, quantum optimization and QUBO formulations, compilation and routing, gate implementation in different hardware technologies, classical digital design, VHDL, simulation tools, and quantum emulation. Seminar contents may also be included during the course. During the written test, students are not allowed to consult books, notes, or other teaching materials. Also, all electronic devices are strictly forbidden.
20% of the final mark is: LABORATORY ACTIVITY
The laboratory component accounts for 20% of the final grade, while the written test accounts for 80%. Laboratory grades are combined with the written test only if the written test reaches at least 18/30.
Lab activities are conducted in groups, but assessment is individual and based on:
(a) the submission of completed exercises via the teaching portal
(b) the related discussion during the labs.
Specifically, the assessment of the lab portion takes into account the quality of the work completed, the discussion during the review labs in terms of clarity of presentation, design and implementation choices, the correct use of the tools introduced in the course, and attendance. A calendar with all the lab dates and the deadlines for submitting the assignments and the oral interviews is provided at the beginning of the course. Lab grades are published at the end of the course.
The final mark is expressed in thirtieths. Honours may be awarded only through the completion of a special project, to be agreed upon with the instructors.
In addition to the message sent by the online system, students with disabilities or Specific Learning Disorders (SLD) are invited to directly inform the professor in charge of the course about the special arrangements for the exam that have been agreed with the Special Needs Unit. The professor has to be informed at least one week before the beginning of the examination session in order to provide students with the most suitable arrangements for each specific type of exam.