|
||||||||||
|
Politecnico di Torino | |||||||||||||||||
Academic Year 2009/10 | |||||||||||||||||
01LQDCY, 01LQDHT Specification and simulation of digital systems |
|||||||||||||||||
Master of science-level of the Bologna process in Computer Engineering - Torino |
|||||||||||||||||
|
|||||||||||||||||
|
|||||||||||||||||
Objectives of the course
The course introduces VHDL as a tool for describing hardware at several abstarction levels, the design methodologies for Register Transfer level digital systems and an overview on CAD tools for simulation, verification, automated synthesis and testing.
|
Prerequisites
Basic notions on digital design.
|
Syllabus
' Design methodologies at Register Transfer Level
' Techniques to model digital systems at several abstraction levels with a hardware description language like VHDL ' Use of simulation as a debug and verification tool at several abstraction leves ' Overview on CAD tools for automatic synthesis, verification and testing |
Bibliography
handouts
|
Revisions / Exam
project work + mandatory oral examination
|
|