The course describes the microelectronics methodologies for the design of modern integrated circuits from system level to physical level. The main SoC and microprocessors functional blocks microarchitectures are reviewed: data-path components and design techniques, control unit design styles, memory system internal structures. Basic concepts on logic families and their timing and power characterization techniques are given. The interconnections system of a model SoC is analyzed: interconnects parasitics, scaling down, thermal and frequency effects are described for signal, clock and power/ground lines. The fundamental techniques for frequency and power dissipation optimization are described, including the most used CAD methodologies, with a focus on physical design. The lab sessions will illustrate the design and optimization of a microprocessor architecture form the RTL level (using VHDL language) to the synthesis optimization phase, again with a focus on the physical design phase (using commercial physical synthesis tools).