|Politecnico di Torino|
|Academic Year 2010/11|
Analog and telecommunication electronics
Master of science-level of the Bologna process in Electronic Engineering - Torino
The course is taught in English.
This is a mandatory course (can be replaced by 'Elettronica Analogica e di Potenza', in Italian) for the Master Degree in Electronics. The course aim is to review and study in depth various subjects of Analog Electronics, with an emphasis on contents related with telecommunication applications. The most relevant issues related with analog and telecommunication subsystems are analyzed in detail, to establish a reference point for the following courses, which addresses more specific subjects.
Expected learning outcomes
- Knowledge of the various types of amplifier stages and their applications; ability to analyze and design the related circuits, carrying out device selection and evaluating the various design choices.
- Ability to analyse and design amplifiers and other circuits based on Operational Amplifiers; knowledge and application of parameters and selection criteria for integrate Op Amps and other integrated complex functional units.
- Quantitative evaluation of effects of sampling and quantization in Analog to Digital conversion; design of A/D systems with error budget allocation. Knowledge of parameters and circuits for A/D and D/A converters. Ability to select active and passive device, and to integrate them in a complex design. Knowledge of differential converters, with evaluation of oversampling and noise shaping effects.
- Knowledge of basic power stages, and of voltage regulator structures (linear and switching). Ability to design power sources and regulators with limited power.
- Knowledge of radio systems architecture for receivers and transmitters, including ZIF digital architectures (SDR). Operation, parameters and basic circuit for radio systems units. Ability to define the characteristics and to design some of these functional units.
- Knowledge of behaviour, models, and applications of Phase Lock Loops (PLLs); ability to analyze a PLL systems, select integrad devices and design circuits for PLLs functional units and for simple PLL-based applications.
Prerequisites / Assumed knowledge
Knowledge of basic electronics, ability to analyze electric networks and circuits. Knowledge of linear and large signal models of MOS and BJTs, and ability to use these models in basic amplifier circuits. Models of real Operational Amplifiers, circuits with negative and positive feedback, ability to design amplifiers in basic configurations. Knowledge and design of most used functional units, such as filters, voltage regulators, signal generators.
Subjects addressed in lectures, practice classes, labs, with allocated time (hours).
Review of amplifier stages, (10 hours)
- basic amplifier stages; nonlinearity, distortion, harmonics, gain compression
- tuned amplifier, large signal analysis
- sine signal generators
Amplifier and filter circuits, time-continuous and switched capacitor (SC); operating limits (10 hours)
- review of time-continuos filters
- basic SC circuits; parameters and nonidealities,
- amplifiers and filters with SC circuits.
A/D/A conversion, parameters, errors, ADC and DAC circuits (20 hours)
- Review of analog and digital signal parameters, sampling, aliasing, SNRq;
- Parameters and errors in DAC and ADC, taxonomy based on complexity and speed; residue and pipeline circuits.
- Differential converters (delta and sigma-delta), oversampling and noise shaping; decimation and interpolation filters;
- Nonlinear converters, logaritmic circuits, voice signal encoding techniques;
- Signal conditioning, anti-aliasing filters, errors in multiplexers and S/H circuits; definition and evaluation of ENOB.
Radio systems. Heterodyne receivers and transmitters, ZIF (10 hours)
- Basic architecures for receiving and transmitting radio systems; heterodyne architecture
- Image signals, I/Q mixer, image rejection techniques;
- Digital radio systems, SDR ;
- Basic modules : LNA, PA, mixer, oscillators; intermodulation and IPs.
Phase lock loops (PLL) (20 hours)
- Linear anlaysis. Loop filter, phase error, capture and lock ranges
- circuiti per demodulatori di fase e VCO
- sintetizzatori ad anello e sintesi digitale diretta
- esempi di PLL e ADPLL integrati
- applicazioni per demodulatori sincroni di segnali analogici e numerici e risincronizzazione di clock
Power devices and circuits (20 hours)
- MOS and BJT devices, SOA
- Power stages (A, B, C, D, common drain), linearity, efficiency
- Driving ON/OFF loads
- Bridge circuits
Linear and switching voltage regulators (10 hours)
- Voltage references;
- Linear power supply and voltage regulators, design of linear power supply;
- Switching voltage regulators.
Practice classes address the limited-complexity designs, related with subject of the previous lectures. The design includes numerical evaluation, which requires hand-held scientific calculators (personal).
Experimental labs are focused towards verification of the circuits designed in the practice classes, with measurements on these same circuits. The course includes a total of 7 or 8 lab sessions. Labs are carried out by teams of 3 students, who must prepare a homework before the lab session, and deliver a report on the design lab measurements. The reports are verified, and taken into account for the final mark.
Texts, readings, handouts and other learning resources
A textbook which includes most of the addressed subject is: Design with Operational Amplifiers and Analog Integrated Circuits (III Edition), McGraw-Hill, 2002.
Radio systems and PLLs are described in: D. Del Corso, Elettronica per Telecomunicazioni, McGraw-Hill, 2000 (in Italian, available as print-on-demand in the publisher's website).
Copies of slides used in the lectures, examples of written tests, instruction manuals for the lab are available from the course website.
Assessment and grading criteria
The final assessment includes a written test and an oral discussion. The written test consists of 2-3 numerical design exercises, related with the main subject addressed in the course (analog circuits, A/D/A conversion systems and circuits, radio systems and PLLs, power stages). Each exercise may have 4-6 questions; to pass the exam, one must deliver correct answer for at least the first two questions. The total time for the written test is two hours. The oral discussion lasts 15' to 20', and concerns all the subjects addressed in the lessons.
The final mark is a weighted average of written test and oral discussion (weight .8) and lab reports evaluation (weight .2). The mark can be improved by developing mini-projects (agreed with the professor), or by preparing good notes from the lectures (to be used in the following years).
Programma definitivo per l'A.A.2010/11