Politecnico di Torino
Politecnico di Torino
Politecnico di Torino
Academic Year 2015/16
System-on-chip architecture
Master of science-level of the Bologna process in Computer Engineering - Torino
Teacher Status SSD Les Ex Lab Tut Years teaching
Macii Alberto ORARIO RICEVIMENTO O2 ING-INF/05 30 30 0 0 5
SSD CFU Activities Area context
ING-INF/05 6 B - Caratterizzanti Ingegneria informatica
01PFP; 01BIT
Subject fundamentals
Course of "Embedded System" section of the Master in Computer Engineering, positioned at the 1st term of the 2nd year.
This course describes and analyzes the main architectural and technological solutions for Embedded Systems automated design, with particular emphasis on multicore systems, hardware-software co-simulations platforms with reference to specific design metrics like temperature, process variability and aging.
Expected learning outcomes
- Knowledge of the main non-idealities of digital systems caused by technology scaling;
- Ability in the analysis of the non-idealities sources and skills in the design of solutions for compensating such non-idealities;
- Ability in the quantitative evaluation of the effectiveness of the design solutions;
- Knowledge of the main issues related to temperature, aging and process variation in modern embedded systems;
- Skills in the design of an embedded system;
- Knowledge of virtual platforms for the hardware-software co-simulation of an embedded system and the evaluation of the controlling software.
Prerequisites / Assumed knowledge
The course requires the knowledge of C programming (data structures and algorithms), as well as basic knowledge of calculus, statistics, digital electronics and digital design, computer architecture and operating systems.
- Introduction to Embedded Systems [2h]
- Architectural templates (single and multicore platforms) [4h]
- Embedded Systems implementation: Single core and multicore [4h]
- ARM and PowerPC processors: Application domains [4h]
- Embedded Buses: Parallel and Serial Busses. Most common Standards (AMBA, CoreConnect, STBus, I2C, SPI) [4h]
- Embedded Memories and Emerging Technologies Memories [2h]
- Multicore Architectures [4h]
- Sensors and actuators [2h]
- Wireless Sensor Networks [6h]
- Design metrics & Optimization Techniques [8h]
o Temperature
o Process variability
o Aging and reliability
o Energy consumption
Delivery modes
In addition to regular lectures, several lab classes will be carried out. Such lab will consist of exercises and projects, developed on "evaluation board" and simulation platforms, concerning the subjects discussed in the course.
Texts, readings, handouts and other learning resources
There is no official textbook. Class handouts and additional material (papers, links to websites, software and manuals) will be made available on the course webpage.
Assessment and grading criteria
The exam consists of two parts: the first is a written test including both numerical exercises and open-answer questions. The time allowed for the test is 2 hours, and the maximum achievable score is 24 points. The second part consists in the execution of projects / reports on the topics covered in the laboratory exercises. The maximum achievable score is 8 points. The final grade is the sum of the scores obtained in the two parts.

Programma definitivo per l'A.A.2015/16

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