Politecnico di Torino
Politecnico di Torino
Politecnico di Torino
Academic Year 2014/15
Computer architectures
Master of science-level of the Bologna process in Computer Engineering - Torino
Master of science-level of the Bologna process in Electronic Engineering - Torino
Teacher Status SSD Les Ex Lab Tut Years teaching
Montuschi Paolo ORARIO RICEVIMENTO PO ING-INF/05 81 0 19.5 0 9
SSD CFU Activities Area context
ING-INF/05 10 B - Caratterizzanti Ingegneria informatica
Subject fundamentals
The course is taught in English.
The course offers an overview of microprocessor based systems with special attention to low level assembly programming in parallel and non-parallel architectures.
Expected learning outcomes
Embedded systems are, among all, tightly combining architecture and special purpose software designs. This implies that both hardware and software projects are not only mutually influencing one the other, but also that an embedded system designer must count on a deep knowledge and expertise of low level programming. The main goal of this course is to provide the Students with these capabilities, both from theoretical and practical points of view.
Prerequisites / Assumed knowledge
Knowledge of basics of computer architectures and systems;
Knowledge and practice of high level programming techniques and language(s).
Review of basic computer systems and architectures;
Characteristics of assembly languages and differences vs. high level languages;
Programming techniques: theory and practice;
Introduction to modern microprocessor architectures;
RISC and superscalar processor architectures and their behavior;
A typical microprocessor-based system architecture.

Real problems and their solutions.
Delivery modes
Class lectures: 50% of the course duration;
Extensive Class exercise time: 30% of the course duration;
Assisted Programming laboratories: 20% of the course duration.

Students are highly invited to interact with Lecturers, both at lecture and exercise times. In addition, Students are highly recommended to interact also by using the resources made available through the web pages of the Course, such as the Forum tools.
Texts, readings, handouts and other learning resources
Any textbook and support available on assembly and parallel systems low level programming;
Optional additional material provided by the Lecturers.

Additional reading (among all):
Irvine, "Assembly language for intel-based computers", IV ed., Prentice Hall
Messmer, "PC hardware book", IV ed., Addison Wesley
J.L. Hennessy, D.A. Patterson, Computer Architecture: a Quantitative Approach, Morgan Kaufmann Publishers, Inc., V Edition, 2012
Steve Furber, ARM system-on-chip architecture, Addison-Wesley, 2000
Assessment and grading criteria
Written part on assembly and parallel systems low level programming;
Mandatory oral part including the practical check of the solutions proposed for the written part.

Lecturers will provide Students with further and more specific details, at the beginning and at the end of the Course.
Several problems proposed as previous written parts will be made available to the Students through the web page of the course

Programma definitivo per l'A.A.2014/15

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