Giorgio Cora

Dottorando in Ingegneria Informatica E Dei Sistemi , 39^o ciclo (2023-2026)
Dipartimento di Automatica e Informatica (DAUIN)

Docente esterno e/o collaboratore didattico
Dipartimento di Automatica e Informatica (DAUIN)

giorgio.cora@polito.it

Profilo

Dottorato di ricerca

Argomento di ricerca

Resilient computing architecture in the space quantum communication era

Tutori

Interessi di ricerca

Computer architectures and Computer aided design

Biografia

Giorgio Cora, born on February 28, 1999, has always been fascinated by electronics, a passion that shaped his path into electronic engineering. He studied at Politecnico di Torino, earning his Bachelor's degree in 2021 and Master's degree in 2023. During his studies, Giorgio developed a strong interest in electronic design and FPGA technology, which became the focus of his master's thesis on the reliability of RISC-V architectures. This experience inspired him to pursue a Ph.D. with the ASAC Group, where he aims to work on reliable designs for space applications, RISC-V analysis, and reconfigurable HPC nodes.
Outside his academic pursuits, Giorgio enjoys basketball, both for competition and personal growth, and finds relaxation in hiking and exploring nature.

Didattica

Insegnamenti

Corso di laurea magistrale

Programmazione di sistema. A.A. 2024/25, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Collaboratore del corso

Ricerca

Gruppi di ricerca

CAD - Electronic CAD & Reliability Group (DAUIN)

Pubblicazioni

Pubblicazioni più recenti Vedi tutte le pubblicazioni su Porto@Iris

Cora, Giorgio; Vacca, Eleonora; DE SIO, Corrado; Azimi, Sarah; Sterpone, Luca (In stampa)
RePAIR: Reconfigurable Platform for AI Resilience within RISC-V Ecosystem. In: The 21st International Symposium on Applied Reconfigurable Computing ARC 2025
Contributo in Atti di Convegno (Proceeding)
Cora, Giorgio; De Sio, Corrado; Azimi, Sarah; Sterpone, Luca (2025)
Selective hardening of RISCV soft-processors for space applications. In: MICROELECTRONICS RELIABILITY, vol. 167. ISSN 0026-2714
Contributo su Rivista
De Sio, C.; Cora, G.; Azimi, S.; Vacca, E.; Sterpone, L. (2024)
Exploring the Resiliency of Hardware CNN for Aerospace Application. In: 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Volos (GRC), July 2-5, 2024. ISBN: 979-8-3503-5192-7
Contributo in Atti di Convegno (Proceeding)
Vacca, Eleonora; Cora, Giorgio; Azimi, Sarah; Sterpone, Luca (2024)
Assessment of RISC-V Processor Suitability for Satellite Applications. In: 21st ACM International Conference on Computing Frontiers, Ischia (ITA), May 7-9, 2024, pp. 116-121. ISBN: 979-8-4007-0492-5
Contributo in Atti di Convegno (Proceeding)
Cora, Giorgio; DE SIO, Corrado; Azimi, Sarah; Sterpone, Luca (2024)
A Novel Robust Core for Detecting Node Failures in FPGA Clusters. In: CF' 24: 21st ACM International Conference on Computing Frontiers, Ischia (ITA), May 7 - 9, 2024, pp. 328-329. ISBN: 979-8-4007-0597-7
Contributo in Atti di Convegno (Proceeding)