DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Exploring Machine Learning techniques for Electronic Design Automation of AMS Integrated Circuits
Thesis in external company Thesis abroad
keywords ANALOG IC DESIGN, ARTIFICIAL INTELLIGENCE, COMPUTER AIDED DESIGN, DIGITAL DESIGN, EDA, ELECTRONIC DESIGN AUTOMATION, ELECTRONICS, HARDWARE DESIGN, IC DESIGN, MACHINE LEARNING, MARIE CURIE PROJECT
Reference persons DANIELE JAHIER PAGLIARI
Thesis type EXPERIMENTAL, HARDWARE, SOFTWARE DEVELOPMENT
Description Electronic Design Automation (EDA) is a fundamental enabler for the design of complex Integrated Circuits (ICs). Digital design flows are nowadays highly automated: designers can translate a high-level specification in VHDL or Verilog into an optimized standard-cell with billions of transistors, with little manual intervention.
The scenario is different for Analog Mixed-Signal (AMS) designs, whose more complex constraints (matching, symmetry, etc) complicate the optimization. Accordingly, most complex AMS layouts are still generated with lots of manual steps, performed by experienced designers. Recently, however, several research groups have shown that Machine Learning (ML) techniques can help solve this issue, automating (at least part of) the AMS flow, while also improving the quality of result of digital flows.
This thesis is in the context of a Horizon 2020 Marie-Curie Research and Innovation Staff Exchange (RISE) project called AMBEATion (https://cordis.europa.eu/project/id/101007730) which involves world leader companies in EDA (Synopsys) and AMS IC design (ST Microelectronics), as well as several european universities. The goal of the project is to develop an automated AMS placement tool, leveraging AI/ML technologies.
The candidate will learn about the main steps of an automated AMS placement tool, and will improve a preliminary version of such tool, experimenting both with classic EDA algorithms and with ML-driven alternatives. In particular, the candidate will have to deal with algorithms that recognize basic circuit topologies in a netlist (current mirrors, differential pairs, etc), estimate their key layout parameters (e.g. area, geometry) and lastly place them in the available IC area.
The AMBEATion project economically supports the exchange of staff from/to universities to/from companies. Therefore, while the thesis will be carried out in Torino (since thesis students are not employees of Politecnico, they are not allowed to travel in the framework of the project), candidates that do a good job during the thesis will be encouraged to apply for a PhD or research assistant position at DAUIN. If they win the position, they will be able to continue working on the project, this time traveling to the premises of one of the involved companies, while receiving a very high retribution (>3500 Euro per month).
Interested candidates must send an email to firstname.lastname@example.org attaching their CV and exams' transcript with scores.
Required skills Required skills include a basic knowledge of electronic circuits and digital logic OR (alternatively) of ML/DL algorithms. Having an understanding of both fields is, of course, ideal, but not mandatory. Knowledge of EDA tools and algorithms (synthesis, place and route etc) is also a plus, but not required.
Notes Thesis in collaboration with Synopsys, ST Microelectronics, CVUT (Prague), University of Catania
Deadline 14/12/2023 PROPONI LA TUA CANDIDATURA