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ELECTRONIC DESIGN AUTOMATION - EDA

Hardware-Software Co-design to Deploy Deep Neural Networks on Extreme-Edge Devices

estero Thesis abroad


keywords ARTIFICIAL INTELLIGENCE, C, CONVOLUTIONAL NEURAL NETWORKS, DEEP LEARNING, DEEP NEURAL NETWORKS, EMBEDDED SYSTEMS, ENERGY EFFICIENCY, FIRMWARE, HARDWARE ACCELERATORS, HARDWARE AND SOFTWARE, HETEROGENEOUS COMPUTING, LINEAR ALGEBRA, LOW POWER, MICROCONTROLLERS, NEURAL NETWORKS ACCELERATORS, SOFTWARE

Reference persons DANIELE JAHIER PAGLIARI, MAURIZIO MARTINA

External reference persons Pasquale Davide Schiavone (EPFL)
Alessio Burrello (Politecnico di Torino)

Research Groups DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA, ELECTRONIC DESIGN AUTOMATION - EDA, GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Thesis type EXPERIMENTAL, HARDWARE AND SOFTWARE DESIGN, SOFTWARE DEVELOPMENT

Description The use of dedicated hardware for the execution of neural networks has led to speedups exceeding 100x (think of Google's TPUs or Cerebras). However, current accelerators present several problems such as:
- Need for dedicated data layouts and operations;
- Need for ad-hoc libraries;
- Need for specific networks;

The purpose of this thesis is to study how novel near-memory computing accelerators can be coupled with more standard accelerators architectures, and to design a framework to optimize Deep Neural Networks (DNNs) deployment on a heterogeneous platform entailing one or more hardware accelerators for DNNs.
In particular, the candidate will:
- Learn about near-memory computing accelerators;
- Write a series of software drivers for their usage;
- Develop a tool for the optimization of neural networks' execution on heterogeneous systems equipped with multiple accelerators;
- Evaluate the latency and energy consumption of various state-of-the-art DNN architectures when deployed using the optiization tool

Interested candidates must send an email to daniele.jahier@polito.it attaching their CV and exams' transcript with scores.

Required skills Required skills include C and Python programming. Further, a basic knowledge of computer architectures and embedded systems is necessary. Desired (but not required) skills include some familiarity with basic machine/deep learning concepts and corresponding models.

Notes Thesis in collaboration with the research group of Prof. Daivd Atienza at the EPFL in Lausanne (Switzerland) and with Prof. Maurizio Martina of the DET department. The thesis can be carried out both in Turin and at EPFL.


Deadline 14/12/2022      PROPONI LA TUA CANDIDATURA