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GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Exploration of uTVM and Extension to Ultra-low-power Multi-core Platforms Based on RISC-V

keywords ARTIFICIAL INTELLIGENCE, COMPILERS, CONVOLUTIONAL NEURAL NETWORKS, DEEP LEARNING, DEEP NEURAL NETWORKS, EMBEDDED SYSTEMS, ENERGY EFFICIENCY, FIRMWARE DEVELOPMENT, LOW POWER, MICROCONTROLLERS, SOFTWARE, SOFTWARE ACCELERATION, TVM, WEARABLE COMPUTING

Reference persons DANIELE JAHIER PAGLIARI

External reference persons Alessio Burrello (Politecnico di Torino)

Research Groups DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA, ELECTRONIC DESIGN AUTOMATION - EDA, GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Thesis type EXPERIMENTAL, SOFTWARE DEVELOPMENT

Description Apache TVM is an open-source compiler for deep learning learning, able to automatically translate high-level models of a Deep Neural Network (e.g. in TensorFlow or Pytorch) to optimized machine code for a given hardware, with backend support for GPUs, CPUs, and various types of customized accelerators. Recently, the uTVM project has extended TVM support to embedded systems and low-power microcontrollers. In particular, many devices based on ARM architectures are currently supported by uTVM, which achieves comparable performance to proprietary toolchains with a reduced effort for the programmer, thanks to automation.

The goal of this thesis is to extend uTVM support to embedded platforms based on the open source RISC-V instruction set. In particular, the final result of the work will be the automatic deployment, through uTVM, of complex deep learning architectures on a commercial multi-core platform based on RISC-V, and the comparison of the resulting binary performance with the ones obtained with platform-specific tools.

Interested candidates must send an email to daniele.jahier@polito.it attaching their CV and exams' transcript with scores.

Required skills Required skills include C programming and a basic understanding of compilers. Furthermore, a basic knowledge of computer architectures and embedded systems is necessary. Desired (but not required) skills include some familiarity with basic machine/deep learning concepts and corresponding models

Notes Thesis in collaboration with Prof. Luca Beniniís research group at the University of Bologna and ETH Zurich.


Deadline 14/12/2023      PROPONI LA TUA CANDIDATURA




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