GRUPPI DI RICERCA

Area Architettura

Area Ingegneria

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Microelectronics

Artificial Intelligence-assisted coverage closure for functional hardware verification

 Tesi esterna in azienda    

Parole chiave FUNCTIONAL VERIFICATION, MACHINE LEARNING, UNIVERSAL VERIFICATION METHODOLOGY

Riferimenti LUCIANO LAVAGNO

Riferimenti esterni Giovanni Auditore, STM Catania

Gruppi di ricerca Microelectronics

Tipo tesi RICERCA

Descrizione The thesis will be done at STM Catania. The goal is to experiment with new industrial tools that use AI and ML to tune constrained random virtual verification sequences, in order to increase coverage.

Conoscenze richieste The student should have knowledge of:
- Digital electronic design
- Computer architecture
- Object-oriented programming

Scadenza validita proposta 07/03/2025      PROPONI LA TUA CANDIDATURA