| KEYWORD |
VLSILAB (VLSI theory, design and applications)
Theses in external company
Design verificatio at TI
Thesis in external company
Reference persons GUIDO MASERA
Research Groups VLSILAB (VLSI theory, design and applications)
Description Texas Instruments (Freising, Germany) is looking for interns and bachelor / master thesis candidates as mentioned in their open position (https://ti.taleo.net/careersection/ti_ex_campus/jobdetail.ftl?job=190004KM&tz=GMT%2B01%3A00&tzname=Europe%2FBerlin).
They have several topics in mind for thesis and intern candidates. The specific topic is normally decided depending on the candidate knowledge and on the interview. A few examples of possible subjects are:
- Formal verification and binding assertions to simulations
- Constraint random verification in SystemVerilog UVM
- Analog model verification
- Automation of things (mainly scripting techniques)
- Smaller side projects with Matlab
Deadline 04/12/2020
PROPONI LA TUA CANDIDATURA