| KEYWORD |
Deep Learning Compiler for Smart Sensors
Thesis in external company
keywords ARTIFICIAL INTELLIGENCE, BIOSIGNAL ANALYSIS, COMPILERS, CONVOLUTIONAL NEURAL NETWORKS, DEEP LEARNING, DEEP NEURAL NETWORKS, EMBEDDED SYSTEMS, ENERGY EFFICIENCY, FIRMWARE DEVELOPMENT, HEALTH, HEALTHCARE, LOW POWER, MICROCONTROLLERS, SOFTWARE, WEARABLE COMPUTING
Reference persons DANIELE JAHIER PAGLIARI
External reference persons Marco Castellano (ST Microelectronics)
Research Groups DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA, ELECTRONIC DESIGN AUTOMATION - EDA, GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Thesis type EXPERIMENTAL, SOFTWARE DEVELOPMENT
Description Modern smart sensors produced by ST Microelectronics, are complex System-on-Chip (SoC) devices that integrate analog and digital components in a single Integrated Circuit. This enables novel and advanced features, such as the possibility of executing inference algorithms based on Machine Learning or Deep Learning (ML/DL) directly on the sensor, with great advantages from the perspective of energy efficiency. For example, a smart Inertial Measurement Unit (IMU) installed in a wearable or mobile system can autonomously perform applications such as activity classification (e.g., predicting whether the user is walking, running, cycling, etc) or fall detection without involving the main system CPU, which can be left in sleep mode and woken up only in specific conditions.
However, the deployment of ML/DL algorithms on these devices is complicated by the lack of an appropriate software infrastructure and toolchain. As a matter of fact, the digital "brain" of these smart sensors is a small RISC core, highly customized to reduce its cost and energy consumption, for which compilers are rarely available, and software is often directly written in assembly (or at most in C). This hampers flexibility, making it very complex for customers to deploy their own ML/DL model on the device.
The goal of this thesis is to develop a new compilation and optimization toolchain for ST smart sensors. In particular, the work will be divided in two main steps. In a first phase, more implementation-oriented, the student will develop a code generation pass for the target architecture, using the LLVM compiler infrastructure, which will allow the deployment of generic software (not ML/DL specific). In the second phase, more research-oriented, the student will then focus on generating optimized code for a specific class of applications, i.e. Deep Learning inference. For this, the student will make use of one of the popular deep learning compilers available open source (microTVM, Glow, MLIR, etc), and will also explore task and hardware-specific optimization such as sparsity, customized quantized data formats, etc.
The final goal of the thesis is to obtain a toolchain able to automatically transform a high-level model specified in PyTorch or Keras into optimized binary code for the target, providing not only a dramatic increase in productivity, but hopefully also a higher quality of results (e.g. lower inference latency or memory occupation) with respect to a manual implementation at C or assembly level. Notably, the scope of this thesis extends even beyond the specific hardware target (STM smart sensors), since the compiler-based flow that will be studied is increasingly used by big players in the field (Google, Facebook, etc) to generate optimized inference code for a plethora of different devices (CPUs, GPUs, custom accelerators, microcontrollers, etc.).
Interested candidates must send an email to daniele.jahier@polito.it attaching their CV and exams' transcript with scores.
Required skills Required skills include C programming and a basic understanding of compilers. Furthermore, a basic knowledge of computer architectures and embedded systems is necessary. Desired (but not required) skills include some familiarity with basic machine/deep learning concepts and corresponding models
Notes Thesis in collaboration with a R&D group of ST Microelectronics, located in the Milan area. The work can be carried out partially remotely, and economic compensation is foreseen.
Deadline 28/12/2022
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