Design of an integrated gate driver for GaN power transistors
Reference persons FRANCO FIORI
Research Groups Microelectronics Electromagnetic Compatibility
Description Last generation GaN power transistors allow designers to increase the switching frequency of power module, thus
obtaining higher power density. However, higher switching frequencies mean higher dv/dt in the power section,
which makes the selection of the power architecture and the design of the gate drivers more challenging.
This MoS thesis aims to develop a gate driver integrated on silicon that avoids metastable operating
states as well as over/under voltages and ringing cased by the fast switching of GaN power transistors.
Deadline 21/03/2023 PROPONI LA TUA CANDIDATURA