Analysis and Modeling of Integrated Power Devices and Multilayer Printed Circuit Boards
Thesis in external company
Reference persons FRANCESCO MUSOLINO
Thesis type MODELING AND SIMULATION
Description The thesis deals with the analysis and the circuital modeling of a power integrated device composed by a high-side switch, a free-wheeling diode and the gate driver starting from the study of the CADENCE models currently available for an existing power device.
The thesis must also include an accurate extraction of the lumped parasitic parameters of a real printed circuit board layout for a BUCK regulator that exploits the previously analyzed power device and that will be employed in low voltage point-of-load (POL) applications.
Required skills Required skills include: Operating principle of switching circuits for power electronics. CADENCE simulator environment for integrated systems.
Notes Location for this thesis is Catania in the Analog Devices/ Maxim Integrated location. Reimbursement of expenses will be provided.
Deadline 30/06/2022 PROPONI LA TUA CANDIDATURA