Evaluation methods for the robustness of a radiation tolerant RISC-V processor for deep space applications
Reference persons LUCA STERPONE
Research Groups DAUIN - GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD
Thesis type RESEARCH / EXPERIMENTAL
Description The RISC-V Instruction Set Architecture (ISA) has emerged as a good candidate for CubeSat processing application especially at Low Earth Orbit (LEO). However, several research works should be done in order to evaluate the usage of RISC-V in long space missions classified as Deep Space. In the present thesis, the student will create new methodologies for evaluating the robustness of a RISC-V architecture implemented on radiation tolerant technology (Microchip RTG4 Flash-based FPGAs) versus Single Event Transients (SETs) and Total Ionizing Dose (TID) effects. The student will have the opportunity to cooperate with the Microchip silicon company.
Required skills Computer Architecture and Assembly languages
Circuit and System design basic knowledge
Deadline 30/09/2022 PROPONI LA TUA CANDIDATURA