| KEYWORD |
Embedded DFT - INFINEON Germany (stage)
Tesi esterna in azienda 
Tesi all'estero
Parole chiave TESTING
Riferimenti PAOLO BERNARDI
Gruppi di ricerca GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD
Tipo tesi RICERCA SPERIMENTALE E TEORICA
Descrizione Logic circuit testing is a fundamental objective of semiconductor industries, given the very large percentage of chips' surface occupied by them. The thesis aims to establish advanced implementation methodologies for validating testing flows, including the usage of on-chip test engines to be programmed by firmware, and practical lab measurements. All stages from the concept to the implementation on-chip are covered in the thesis. The student will gain a broad insight into industrial SoC development. In collaboration with INFINEON, Munich.
Conoscenze richieste Being familiar with digital circuit design
Knowledge about design for test (DFT)
EDA tools (Simulation-Fault simulation) and Python
Measurement Equipment
Note The thesis worksite is Munich, Germany. The Infineon company grants a salary to the enrolled student.
Scadenza validita proposta 23/11/2022
PROPONI LA TUA CANDIDATURA