High-speed lossless current sense for integrated power ICs with emulated on time ramp
Thesis in external company
Reference persons FRANCESCO MUSOLINO
External reference persons La tesi sarà supportata dal team di ingegneri di Analog Devices/Maxim Integrated.
Research Groups Microelectronics
Thesis type DESIGN AND SIMULATIONS
Description Switching Buck converters that are operated at high switching frequencies and are controlled under the “peak current mode” could experience issues in case of very small duty cycles. This, in fact, results in large electrical stresses on current sense circuits. These circuits are responsible for the reconstruction of the current waveform during the on-time of the switch to assure stability and good jitter performance.
The proposed Thesis concerns the analysis and the preliminary design of a current sense circuit based on the “replica FET” topology, which is currently employed in switching regulators with integrated FET (point of load and smart slave). Differently from standard circuits in which the high side power FET current is measured, the goal of the proposed work is to evaluate and design a circuit capable of emulating the on time current with the most suitable technique to get good performance to overcome the main limitations of standard circuits.
The work includes the study of different topologies and solutions at the state-of-the art and a preliminary design that, starting from the use of Analog Devices IPs, will be promising to emulate the current.
The proposed solution must provide good performance when inserted into systems including standard inductor as well as coupled inductors.
The activity requires the knowledge of the BCD technology (the design will be carried out by a 20V BCD process with 90nm lithography) and the use of the circuital simulator SPECTRE (CADENCE).
Required skills Required competences for this work include switching power converters, BCD technology (the design will be carried out by a 20V BCD process with 90nm lithography) and the use of the circuital simulator SPECTRE (CADENCE).
Notes The thesis will be carried out in the Analog Devices/Maxim Integrated located in Catania. Reimbursement of expenses will be provided.
Deadline 30/11/2022 PROPONI LA TUA CANDIDATURA