Fault Tolerance design techniques and Testing methods for FPGA devices
Reference persons LUCA STERPONE
Research Groups DAUIN - AEROSPACE AND SAFETY COMPUTING LAB
Thesis type EXPERIMENTAL
Description The thesis is oriented to the study and development of fault tolerance analysis and design methods for Field Programmable Gate Arrays (FPGAs) to safety critical applications.
The students will have the availability of a FPGA boards.
The thesis is in collaboration with the European Space Agency (ESA) and Argotec.
Required skills C, C++, HDL, basic knowledge of synthesis, simulation and testing of circuits
Notes The thesis is performed in collaboration with the ESA and Argotec
Deadline 26/01/2024 PROPONI LA TUA CANDIDATURA