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  KEYWORD

Fault Tolerance design techniques and Testing methods for FPGA devices

Parole chiave FAULT TOLERANCE, GPU, NVIDIA, ACCELERATOR, TEST, TESTING EQUIPMENT

Riferimenti LUCA STERPONE

Gruppi di ricerca DAUIN - AEROSPACE AND SAFETY COMPUTING LAB

Tipo tesi EXPERIMENTAL

Descrizione The thesis is oriented to the study and development of fault tolerance analysis and design methods for Field Programmable Gate Arrays (FPGAs) to safety critical applications.

The students will have the availability of a FPGA boards.

The thesis is in collaboration with the European Space Agency (ESA) and Argotec.

Conoscenze richieste C, C++, HDL, basic knowledge of synthesis, simulation and testing of circuits

Note The thesis is performed in collaboration with the ESA and Argotec


Scadenza validita proposta 26/01/2024      PROPONI LA TUA CANDIDATURA




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