KEYWORD |
Reconfigurable-oriented fault tolerance DSP applications for aerospace satellite electronic systems
Tesi all'estero
Parole chiave FPGA, SAFETY
Riferimenti LUCA STERPONE
Gruppi di ricerca DAUIN - AEROSPACE AND SAFETY COMPUTING LAB
Tipo tesi RESEARCH
Descrizione The activity of the present thesis is oriented on the development of fault tolerance design techniques for satellite electronic system payload using the modern generation of Xilinx SRAM-based FPGAs that support dynamic reconfiguration (i.e., the possibility to change the physical design on-site and therefore correcting errors and optimizing performances). The activity of the thesis is executed in part in the CAD group of Politecnico di Torino, DAUIN and in part within the ESTEC laboratories of the European Space Agency (ESA) in Leiden, The Netherlands
Conoscenze richieste Specification, Simulations of Digital Systems, VHDL, C/C++ languages
Note Fluent english
Scadenza validita proposta 26/01/2024
PROPONI LA TUA CANDIDATURA