| KEYWORD |
Area Ingegneria
FPGA virtualization solutions
Tesi esterna in azienda 
Tesi all'estero
Parole chiave FPGA-BASED DESIGN, PARTIAL RECONFIGURATION
Riferimenti LUCIANO LAVAGNO
Riferimenti esterni Daniel Raho, Virtual Open Systems, Grenoble, France
Gruppi di ricerca microelettronica
Tipo tesi DEVELOPMENT
Descrizione The intern will be integrated into the design and development team to develop innovative framework and tools for embedded virtualization systems. In this context, the intern will support the development activities of FPGA virtualization solutions leveraging SR-IOV and partial reconfiguration to maximize system efficiency and performance in Telecom/Space communications, HPC and Cloud Computing.
This requires a good knowledge of FPGA design and embedded firmware design.
Conoscenze richieste FPGA design and embedded firmware design.
Excellent communication skills and good teamwork, written and spoken English.
Note In case you are interested, please send me your CV by email.
The position can become a full time job at the end of the thesis.
Scadenza validita proposta 03/10/2025
PROPONI LA TUA CANDIDATURA