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  KEYWORD

Hardware acceleration of machine learning algorithms for sensing and processing at the edge with a dedicated microchip (developed by Sensichips)

azienda Tesi esterna in azienda    


Riferimenti MARIO ROBERTO CASU, LUCIANO LAVAGNO

Riferimenti esterni Ing. Roberto Simmarano (Sensichips)

Gruppi di ricerca VLSILAB (VLSI theory, design and applications)

Tipo tesi EXPERIMENTAL - DESIGN

Descrizione It is foreseen that machine learning will be an integral part of most sensors. Sensichips has developed a proprietary microchip, codenamed SENSIPLUS, including sensors, signal conditioning, advanced multi-measurand analytical tools and a proprietary micro Neural Processor Unit (NPU) into a single 1.5x1.5mm microchip. In its first generation the NPU can execute neural networks and single sample machine learning algorithms. With the proposed Thesis we would like to extend the current NPU capabilities to support convolutional and deep learning algorithms. The key challenge to be addressed is to modify and accelerate such algorithms to achieve the smallest possible hardware addition, custom instruction set and support the most efficient execution.

Vedi anche  sensichips_company_brief.pdf 

Conoscenze richieste VHDL or Verilog


Scadenza validita proposta 07/12/2024      PROPONI LA TUA CANDIDATURA