KEYWORD |
Exploration of Fault Attack Mutations
keywords COMPUTER ARCHITECTURES, CYBER SECURITY, FAULT ATTACKS, HARDWARE SECURITY
Reference persons STEFANO DI CARLO, ALESSANDRO SAVINO
Research Groups DAUIN - GR-24 - reSilient coMputer archItectures and LIfE Sci - SMILIES
Description This thesis proposal aims to allow students to delve into the complexities of Instruction Set Architectures (ISAs) and explore the impact of fault attack mutations on these architectures. The project will develop comprehensive models of various ISAs, simulate fault attacks, examine the resiliency of the ISA, and analyze the effectiveness of different mitigation strategies.
Objectives:
- Develop detailed models for different ISAs, including RISC, ARM, and x86.
- Explore and simulate various fault attack techniques such as voltage glitching, clock skewing, and electromagnetic interference.
- Analyze the impact of these fault attacks on the functionality and security of different ISAs.
- Propose and evaluate countermeasures to mitigate the effects of fault attacks.
Required skills - C/C++
- Computer Architectures
- Python
- Databases
Deadline 28/05/2025
PROPONI LA TUA CANDIDATURA