| KEYWORD |
Area Engineering
Design of Digital Demodulators for PowerReceiver-to-PowerTransmitter communication in Wireless Power Transfer systems
Thesis in external company
keywords DEMODULATORS, DIGITAL SIGNAL PROCESSING, EMBEDDED SYSTEMS, HIGH LEVEL SYNTHESIS TOOLS, RTL DESIGN
Reference persons FABRIZIO RIENTE, GIOVANNA TURVANI
External reference persons Giovanni Amedeo Cirillo (STMicroelectronics)
Research Groups VLSILAB (VLSI theory, design and applications)
Thesis type HW DESIGN, SW DEVELOPMENT
Description Integrated Circuits (ICs) designed and produced by STMicroelectronics integrate both analog and digital components. Digital Signal Processing (DSP) has an important role in communication interfaces of Wireless Power Transfer (WPT) systems compliant with the Qi standard, where a Power Transmitter (PTx) generates a near-field inductive power and controls its transfer to a Power Receiver (PRx). In particular, PRx can send messages to PTx implementing an Amplitude Shift Keying (ASK) modulation of the current or voltage of the coil of PTx, while PTx can communicate with PRx with a Frequency Shift Keying (FSK) of the power signal.
The digital front-end Analog & MEMS (A&M) R&D group of the Analog, Power & Discrete, MEMS and Sensors (AMS) group of STMicroelectronics is working on the design of ASK demodulators compliant with the Qi standard, to be integrated in future products. Application-specific digital blocks are surely involved in these devices, but also firmware can be employed for some tasks. Reliable design requires to focus the attention on multiple aspects, such as filters design, effects of the finite-precision arithmetic in digital blocks and timing issues.
The STMicroelectronics APMS A&M R&D group is going to enhance the knowledge of the design of these ASK demodulators, in terms of evaluation of multiple DSP architectures and consolidation of a design flow. Demodulation chain organization can be investigated with preliminary models in scripting languages like MATLAB and Python, also characterized by specific toolboxes and libraries for DSP. Then a C/C++ description of the designed demodulator can be obtained; this software model is wished to be developed in a sufficiently generic way to be employed as a golden model for the application-specific hardware to be designed, as starting point for the automatic generation of a hardware description with High-Level Synthesis (HLS) tools, even as firmware for an on-chip microcontroller. In all cases, a Register-Transfer-Level (RTL) description in VHDL or Verilog of the demodulators must be obtained, with codes written by the designer or automatically generated by HLS tools or scripting libraries to be properly analyzed and inspected. The design methodology defined in this macro-R&D-activity is hoped to be extended in the future to other DSP applications.
Multiple theses concerning the design of ASK demodulators for WPT systems are proposed. Students interested in a thesis project involving RTL design, DSP, scripting and digital arithmetic are invited to submit their application, sending an email to professors.
Required skills A basic knowledge of digital design, computer architectures and embedded systems is necessary. Required skills include hardware description in VHDL or Verilog and programming in C/C++ and at least in one language among MATLAB and Python. Desired (but not required) skills include some familiarity with basic Digital Signal Processing concepts and scripting in Bash and TCL.
Notes Thesis in collaboration with a R&D group of STMicroelectronics, mainly located in the Milan and Catania areas. The work can be carried out partially remotely.
Deadline 07/08/2025
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