| KEYWORD |
Area Engineering
Parallel computation in Flight Control Computer application.
Thesis in external company
Reference persons MARIO ROBERTO CASU
External reference persons Riccardo Sticca
Research Groups VLSILAB (VLSI theory, design and applications)
Description This thesis will be done at Leonardo Spa, Caselle Plant, Turin
The advent of high-performance computing on aircraft computer platforms is generating several design challenges: digital fly-by-wire Flight Control Computer provides complex algorithms of actuation control loop, which require hardware overhead to compute their operations efficiently.
To address this task, the AMD Xilinx Versal ACAP (Adaptive Compute Acceleration Platform) platform provides a cutting-edge and promising architecture. This FPGA is the industry’s first compute architecture that comprises acceleration engines (i.e. AI Engines) for scalar and vector processing, tightly coupled with programmable logic and configurable on-chip connectivity to enable customized and heterogeneous hardware solutions.
This thesis focuses in developing digital microarchitecture, employed in airborne electronic modules, in Versal and evaluating its hardware implementation in typical DSP logic blocks and in the AI Engines according to the required operations schedule.
The thesis work includes financial compensation.
Required skills Skills in at least one of the following areas are required
- Digital design methodologies and FPGA design workflow
- Model-based design
- Embedded system programming (C, C++)
- VHDL or Verilog
Skills in the following are desirable but not strictly necessart
- Scripting (e.g. Python)
- MATLAB and Simulink
Deadline 23/09/2025
PROPONI LA TUA CANDIDATURA