Development of a Design Environment for the Automated Synthesis of dependable image processing sub-systems
keywords DEPENDABLE SYSTEM DESIGN, DIGITAL SYSTEM DESIGN TEST AND VERIFICATION, ESL TOOLS AND ENVIRONMENTS, HARWARE ACCELERATORS, HIGH LEVEL SYNTHESIS TOOLS, IMAGE PROCESSING
Reference persons STEFANO DI CARLO, PAOLO ERNESTO PRINETTO
External reference persons INDACO Marco (PhD Candidate)
ROLFO Daniele (PhD Student)
Research Groups TESTGROUP - TESTGROUP
Thesis type EXPERIMENTAL
The 2-D Convolution is an widely used algorithm in image and video processing. Although its computation is simple, its implementation requires both a high computational power and an intensive use of memory.
Field Programmable Gate Arrays (FPGA) architectures were proposed to accelerate 2-D Convolution computation.
When designing FPGA-based Harware accelerators, designers have to deal with a plenty of design constraints and no efficient design environment is today available to support them.
The thesis aims at developing a framework to support the automated synthesis of dependable image processing sub-systems.
In particular the tool will rely on Cadence CtoS to allow the candidate to perform a significant architectural exploration.
Particular emphasis will be given to the implementations of the 2D-convolution algorithms satisfying a set of user provided constraints, such as: power, latency, Kernel size, etc.
During this thesis the candidate will learn the basis of image processing and gain skill on high level synthesis tools and on the development of advanced ESL tools.
Required skills Programming Languages: C++, VHDL
Digital System design methodologies
Notes The thesis will be developed in cooperation with Thales AleniaSpace Spa, Turin
Number of required Students : 1
Deadline 31/12/2012 PROPONI LA TUA CANDIDATURA