Development of an innovative Hybrid HW/SW Architecture
keywords DIGITAL SYSTEM DESIGN TEST AND VERIFICATION, DYNAMIC PARTIAL RECONFIGURATION, EMBEDDED SYSTEMS, FPGA, HYBRID ARCHITECTURE, OPERATING SYSTEM, REAL-TIME SYSTEM, SERVICE ORIENTED ARCHITECTURE, SYSTEM LEVEL DESIGN & TEST
External reference persons INDACO Marco (PhD Candidate)
ROLFO Daniele (PhD Student)
Research Groups TESTGROUP - TESTGROUP
Thesis type EXPERIMENTAL
The use of hybrid reconfigurable architectures based on a mixture of general purpose processors and reconfigurable components (i.e., FPGA) has gained a relevant importance across the scientific community. In particular, currently, the hybrid architectures are increasingly used both to accelerate computational tasks and to increase architectures' reliability.
An actual and important research issue regards with the development of an innovative cross-mechanism able to dynamically switch the execution flow from CPU to reconfigurable components.
In this context, the thesis aims at designing a sophisticated and intelligent hybrid dynamically reconfigurable architecture able both to monitor overall system performances and to schedule execution flow in HW or SW in order to fit application requirements.
During this thesis the candidate will learn the design methodology of complex hybrid architecture and will gain skills on dynamic partial reconfiguration, FPGA, Operating System and real-time system monitoring techniques.
Required skills Programming Languages: C/C++, VHDL
Digital System design methodologies
Basic knowledge of operating systems
Notes The thesis will be developed in cooperation with Thales AleniaSpace Spa and Ansaldo STS (Genoa, Naples).
Number of required Students : 1 or 2
Deadline 31/12/2012 PROPONI LA TUA CANDIDATURA