KEYWORD |
Software levels' power consumption contribution estimation in Non-Volatile Memories architecture
Parole chiave DIGITAL SYSTEM DESIGN TEST AND VERIFICATION, FLASH MEMORIES, NON-VOLATILE MEMORIES, POWER CONSUMPTION ESTIMATION, SOFTWARE DEVELOPMENT, SOFTWARE ENGINEERING
Riferimenti STEFANO DI CARLO, PAOLO ERNESTO PRINETTO
Riferimenti esterni INDACO Marco (PhD Candidate), GALFANO Salvatore (PhD Student)
Gruppi di ricerca TESTGROUP - TESTGROUP
Tipo tesi EXPERIMENTAL
Descrizione Motivations:
Limiting power consumptions is a key issue in the design of Non-Volatile Memories (NVMs) as they are always more increasingly used in mobile systems. Though it is not of immediate realization, software has a deep impact on the overall system power consumption.
Learning outcomes:
During this thesis the candidate will acquire a more accurate vision of Non-Volatile Memories’ software stack and power consumption estimation methodologies. Nevertheless higher programming skills will be achieved.
Goals:
The thesis’ first goal is to identify the power consumption contributions due to software levels needed for NVMs’ utilization. Next a methodology and a software framework to estimate these contributions will have to be implemented.
Conoscenze richieste Programming Languages: C/C++, Operating Systems knowledge
Note The thesis will be developed within the framework of a joint research project between the Testgroup of Politecnico di Torino and MPSoC group of Università di Ferrara.
Scadenza validita proposta 31/12/2012
PROPONI LA TUA CANDIDATURA