Microprocessor-based Selft Test for on-line testing of airplane electronic system
Thesis in external company
keywords FPGA, TESTING EQUIPMENT
Reference persons LUCA STERPONE
Research Groups ELECTRONIC CAD & RELIABILITY GROUP - CAD
Thesis type EXPERIMENTAL
Description The topic of the thesis is to study and develop a microprocessor based self test core on an Altera Cyclone FPGA that allow on-line testing of airplane electronic circuitry. The case study is an industrial property of TESEO SpA. The work will consists on the development of HDL and C/C++ software code for the testing and activation of the HW components connected to the main FPGA board.
The thesis will be executed at the TESEO research laboratories.
A scholarship of 500 €, which include Teseo Ticket Restaurant, as reimbursement of out of pocket expenses is provided. In case of highly performing students (based on the evaluation made by the Professor and Teseo) an additional final premium of 500 € will be granted.
See also teseo_thesis_proposal.pdf
Required skills Good knowledge of VHDL language and FPGA simulation tools
It is appreciated the basic knowledge of testing techniques
Deadline 25/02/2012 PROPONI LA TUA CANDIDATURA