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  KEYWORD

Reconfigurable-oriented fault tolerance DSP applications for aerospace satellite electronic systems

estero Thesis abroad


keywords FPGA, SAFETY

Reference persons LUCA STERPONE

Research Groups ELECTRONIC CAD & RELIABILITY GROUP - CAD

Thesis type RESEARCH, INNOVATIVE

Description The activity of the present thesis is oriented on the development of fault tolerance design techniques for satellite electronic system payload using the modern generation of Xilinx SRAM-based FPGAs that support dynamic reconfiguration (i.e., the possibility to change the physical design on-site and therefore correcting errors and optimizing performances). The activity of the thesis is executed in part in the CAD group of Politecnico di Torino, DAUIN and in part within the ESTEC laboratories of the European Space Agency (ESA) in Leiden, The Netherlands

Required skills Specification, Simulations of Digital Systems, VHDL, C/C++ languages

Notes Fluent english


Deadline 09/10/2014      PROPONI LA TUA CANDIDATURA




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