Methods for the dependability evaluation of FPGA with dynamic reconfiguration
Reference persons LUCA STERPONE
Research Groups ELECTRONIC CAD & RELIABILITY GROUP - CAD
Thesis type RESEARCH, INNOVATIVE
Description The activity of the present thesis is oriented to the development of techniques able to evaluate the dependability of FPGA devices with respect to errors induced by ionizing particles. The FPGA devices addressed in the thesis is the last generation ones: Xilinx Kintex-7. The goal of the thesis is the development of a method able to accurately compute an error computation of a device used in safety critical application field (from the aerospace and avionic, to the automotive or biomedical) and to compute the average error rate or soft error rate (SER). The thesis is performed in collaboration with Xilinx Ireland, Dublin.
Required skills VHDL, C/C++, ASM
Notes Thesis in collaboration with Xilinx Ireland (Dublin)
Deadline 09/10/2014 PROPONI LA TUA CANDIDATURA