Development of an GPGPU-based in-circuit simulator
Reference persons LUCA STERPONE
Research Groups GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD
Thesis type RESEARCH, INNOVATIVE
Description The thesis activity is oriented to development of a simulator on GPU architecture able to simulate the behavior of a digital circuit at nanometric level exploiting the paradigm of the parallel computing. The thesis will be done at the CAD group laboratory.
Required skills C/C++ languages, parallel programming knowledge (better if Cuda), Python.
Deadline 03/10/2019 PROPONI LA TUA CANDIDATURA