Fault Injection methods for concurrent threads on i7 processor cores
Reference persons LUCA STERPONE
Research Groups DAUIN - GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD
Thesis type APPLIED RESEARCH
Description Modern processors, such as i7, are based on multi cores architecture capable to execute several concurrent processes and to tune their performances with respect to power and work load. The study of the present thesis is focused on the evaluation of the transient error effects of i7 architecture while executing high performance applications. The activity is supported by Intel, ESA and by the Hipeac consortium.
Required skills Assembler and Computer Architecture.
Notes A good knowledge of Python is welcome.
Deadline 31/05/2020 PROPONI LA TUA CANDIDATURA