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  KEYWORD

Post-Quantum cryptography for IoT devices

keywords CRYPTOGRAPHY, POST-QUANTUM

Reference persons DANILO BAZZANELLA

External reference persons ST Microelectronics

Research Groups Crittografia e teoria dei numeri

Thesis type TESI IN AZIENDA

Description POST-QUANTUM CRYPTOGRAPHY FOR IOT DEVICES (3 DIFFERENT PROPOSALS) - (Tesi in azienda: ST Microelectronics)

The recent developments in quantum-computing are posing contemporary public-key cryptographic solutions under a serious threat. Consequently, research communities, ranging from mathematical to engineering ones, as well as standardization agencies are dealing with the problem of designing security systems that could resist the overcome of quantum computers, so called post-quantum or quantum-safe systems. Several approaches have been proposed, such as Codes, Lattices, Multivariate and Supersingular elliptic curve isogeny cryptographies. Different thesis/internship subjects are available on the analysis of these approaches in the context of IoT devices. The details will be defined based on the candidates profile and interests.

1 - ANALYSIS OF PARAMETER CHOICES VS SECURITY AND PERFORMANCE (for Multivariate cryptography or Supersingular elliptic curve isogeny) For a given cryptographic scheme, different parameter sets are usually defined. Each choice has an impact on the security level that the scheme guarantees but also on the performance of the scheme, such as the execution time and the memory requirements. The purpose of this activity is to study the security proofs at the basis of the chosen scheme(s) and understand how these influence the parameters choice and how the parameter choice in turn influences performance. The candidate is expected to develop a prototype implementation (in python or C, not optimized) of the algorithm(s) to support the analysis.

2 - OPTIMIZED SOFTWARE IMPLEMENTATION The goal of this work is to develop an optimized software implementation (in C or Assembly) of the chosen algorithm(s) for low-power microcontrollers based on ARM Cortex-M4. The candidate will start from a reference implementation of the scheme to verify its performance on chip, in terms of both speed and footprint. Then, the candidate will investigate optimization solutions to improve such performance and evaluate different tradeoffs.

3 - SIDE-CHANNEL ATTACKS Side-channel attacks (SCA) are a class of attacks which exploits physical leakages (like timing, power consumption or electro-magnetic radiation) of an implementation to derive information on the secret data manipulated by the algorithm. The purpose of this activity is to analyze the possible weaknesses of the chosen algorithm(s) against SCA and evaluate possible countermeasures. After a study of the state of the art of SCA against the chosen algorithm (or similar algorithms), the candidate will perform an evaluation of the reference implementations available. Based on the result of the SCA evaluation, the candidate (with the support of the team) will propose and evaluate possible countermeasures to block SCA.


Deadline 01/03/2023      PROPONI LA TUA CANDIDATURA




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