| KEYWORD |
Functional test strategies for Forwarding and Hazard Detection Mechanisms on dual-issue pipelined processors
Reference persons EDGAR ERNESTO SANCHEZ SANCHEZ
External reference persons Davide Piumatti
Andrea Floridia
Annachiara Ruospo
Research Groups GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD
Description This thesis proposal aims at developing software test procedures
oriented to detect the occurrence of faults in the hazard detection
and forwarding mechanisms of modern industrial dual-issue superscalar
processors, currently produced by STMicroelectronics for automotive
applications.
The work will be performed within the Electronic CAD & Reliability
group of DAUIN, in tight collaboration with STMicroelectronics. The
thesis student will leverage the many-years know-how of the research
group in these topics. Occasionally, there will be the possibility of
daily travels to ST headquarters in Agrate, Milano. The potential
outcome of the thesis project is both related to industrial advances
and high quality publications.
Required skills - knowledge of C and Assembly programming;
- knowledge of computer architecture concepts;
- understanding of RTL descriptions;
Deadline 07/03/2020
PROPONI LA TUA CANDIDATURA