Development of an FPGA-based emulator for reliability analysis of modern System-on-Chips
Reference persons EDGAR ERNESTO SANCHEZ SANCHEZ
External reference persons Andrea Floridia
Research Groups DAUIN - GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD
Description Machine learning-based applications and neural networks are becoming widespread in safety-critical domains. For example, in the automotive field, modern SoCs integrate dedicated hardware accelerators (intended for neural networks or similar) in order to speed-up autonomous driving tasks. In these domains, it is mandatory to identify possible random hardware failures of the system and the observable effects (called failure modes). Typically, these analyses are accomplished by means of long simulations. However, due to the complexity of these systems (from both the software and hardware viewpoints), in practice it is becoming unfeasible to rely on simulation solely. Therefore, the aim of this thesis work is to develop a test environment based on system emulation through FPGAs. The end-goal is to complement the existing simulation-based approaches, in order to perform faster and more accurate analyses.
Required skills - Embedded Systems;
- Programming/scripting skills;
Deadline 16/03/2021 PROPONI LA TUA CANDIDATURA