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Design of dedicated hardware for Artificial Intelligence (AI) using an Embedded Scalable Platform (ESP)

keywords ARTIFICIAL INTELLIGENCE, HARDWARE DESIGN, NEURAL NETWORKS, EMBEDDED SYSTEMS, C++ PROGRAMMING

Reference persons MARIO ROBERTO CASU

Research Groups VLSILAB (VLSI theory, design and applications)

Description Artificial Intelligence and Machine Learning (AI/ML) dedicated hardware implementations are necessary for efficient deployment in embedded platforms. In this thesis you will use an Open Source platform called Embedded Scalable Platform (ESP) (https://www.esp.cs.columbia.edu/) to first design and then integrate a specific hardware accelerator for AI/ML. Depending on your skills, background, and interests, the design can be tested on an FPGA-based emulation platform, or made ready for an ASIC design flow.

Required skills RTL design (VHDL or Verilog), C/C++ coding ability


Deadline 15/04/2023      PROPONI LA TUA CANDIDATURA




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