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Keyword: EMBEDDED SYSTEMS

esteroTESI ALL'ESTERO Advanced C++14 Multithreading Modelling of Electronics Systems  SANCHEZ SANCHEZ EDGAR ERNESTO  SAVINO ALESSANDRO  TESTGROUP - TESTGROUP
Analisi sperimentale di pile protocollari in tempo reale  CIBRARIO BERTOLOTTI IVAN  IEIIT/CNR COMPUTER ENGINEERING AND NETWORKS GROUP
Approximate Computing Benchmarks for Embedded Systems  SAVINO ALESSANDRO  TESTGROUP - TESTGROUP
Benchmarking Control-Flow Integrity Solutions for Embedded Systems  PRINETTO PAOLO ERNESTO  GR-21 - TESTGROUP - TESTGROUP
Binary Code Compression & Decompression via custom Executable Packers  PRINETTO PAOLO ERNESTO  GR-21 - TESTGROUP - TESTGROUP
azienda TESI AZIENDA Boot Time Estimation Model & Tool  TORCHIANO MARCO  SOFTWARE ENGINEERING GROUP - SOFTENG
Convolutional Neural Network cores towards Deep Space  STERPONE LUCA  GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD
azienda TESI AZIENDA Deep Learning Compiler for Smart Sensors  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Deep Learning compiler for ultra-low-power multi-core platforms based on RISC-V  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Deep learning for biometric identification using PPG signals  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
azienda TESI AZIENDA Design of a C++ control application for innovative laser-based tires profiling system @Tire Profiles Italy  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Design of a FPGA-based MPEG compression algorithm for UAV payload  DI CARLO STEFANO  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Design of a FPGA-based OCR algorithm for UAV payload control  DI CARLO STEFANO  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Design of a FPGA-based TPM Security Device  DI CARLO STEFANO  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Design of a FPGA-based processor for UAV payload control  DI CARLO STEFANO  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Design of a secure challenge-response protocol based on Physical Unclonable Functions (PUFs) for ARM platforms  PRINETTO PAOLO ERNESTO  GR-21 - TESTGROUP - TESTGROUP
Development and comparison of convolutional layers implementations for deep neural networks on microcontrollers.  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Development of a Security-Oriented RISC-V SoC Architecture  PRINETTO PAOLO ERNESTO  GR-21 - TESTGROUP - TESTGROUP
Development of an innovative Hybrid HW/SW Architecture  DI CARLO STEFANO  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Effective and secure challenge-response protocol for FPGA-based PUFs (Physical Unclonable Functions)  PRINETTO PAOLO ERNESTO  GR-21 - TESTGROUP - TESTGROUP
Embedded Systems Security via Control-Flow Integrity  PRINETTO PAOLO ERNESTO  GR-21 - TESTGROUP - TESTGROUP
Enhancing dependability in FPGA-based systems for future space exploration missions  DI CARLO STEFANO  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Experimental evaluation of High Level Synthesis Tools and related Design Styles definition  DI CARLO STEFANO  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
FPGA-based accelerators for future Mars exploration missions  DI CARLO STEFANO  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
FPGA-based implementation of Cryptographic Algorithms for the Advanced Open-source Security Platform SEcube™  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Fast and Secure Image Processing applications  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Hardware-Based Schedulers approaches for Linux OS  REBAUDENGO MAURIZIO  SAVINO ALESSANDRO  ELECTRONIC CAD & RELIABILITY GROUP - CAD  TESTGROUP - TESTGROUP
Implementazione di Reti Neurali Convoluzionali a precisione ridotta  JAHIER PAGLIARI DANIELE  PONCINO MASSIMO  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Integrating convolutional neural networks accelerators in commercial MCUs  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
esteroTESI ALL'ESTERO Integration of Deep-learning-powered Drone-to-drone Pose Estimation on Ultra-low-power Autonomous Flying Nano-drones  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Internet Protocol (IP) support for SEcube™ board  PRINETTO PAOLO ERNESTO  GR-21 - TESTGROUP - TESTGROUP
azienda TESI AZIENDA Logiche avanzate di controllo per macchine elettriche per trazione  VIOLANTE MASSIMO  DAUIN - GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD
Memory access optimizations for executing deep neural networks on multi-core microcontrollers  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Multithreaded support Embedded Application on RISC-V  SANCHEZ SANCHEZ EDGAR ERNESTO  SAVINO ALESSANDRO  ELECTRONIC CAD & RELIABILITY GROUP - CAD  TESTGROUP - TESTGROUP
Public Key Infrastructure for the SEcube™ Platform  PRINETTO PAOLO ERNESTO  GR-21 - TESTGROUP - TESTGROUP
Secure Data Management in e-Health Applications through the Advanced Open-source Security Platform SEcube™  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Secure Device Drivers Development for the Advanced Open-Source Security Platform SEcube™  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Secure Edge-Computing exploiting Artificial Intelligence Applications  PRINETTO PAOLO ERNESTO  GR-21 - TESTGROUP - TESTGROUP
Secure File System Development for the Advanced Open-source Security Platform SEcube™  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Secure Internet-of-Things (IoT) applications in Industry 4.0  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Securing IoT Communications via the SEcube™ Platform  PRINETTO PAOLO ERNESTO  GR-21 - TESTGROUP - TESTGROUP
Software Development Kit (SDK) Development for the Advanced Open-source Security Platform SEcube™  PRINETTO PAOLO ERNESTO  TESTGROUP - TESTGROUP
Studio e riprogettazione dell'interfaccia utente di controllo dei sistemi didattici audiovisivi  CORNO FULVIO  DE RUSSIS LUIGI  DAUIN - GR-10 - Intelligent and Interactive Systems - e-LITE
Study and development of a Reconfigurable-based Adaptive Artifical Intelligence Core  STERPONE LUCA  GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD
Sviluppo di algoritmi di monitoraggio su sistemi Embedded con architerttura ARM per applicazioni ferroviarie.  BOSSO NICOLA  Laboratorio di costruzione e dinamica ferroviaria
Sviluppo di un ambiente basato su QEMU per la caratterizzazione affidabilistica di sistemi on chip Xilinx  BERNARDI PAOLO  GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD
Sviluppo di un sistema open source per l'automazione delle misure di test di superfici e materiali nanostrutturati in laboratorio  JANNER DAVIDE LUCA  AA - Glasses, Ceramics and Composites




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